Cargando…

100 Gbps PCI-Express readout for the LHCb upgrade

Mostrar otras versiones (2)

We present a new data acquisition system under development for the next upgrade of the LHCb experiment at CERN. We focus in particular on the design of a new generation of readout boards, the PCIe40, and on the viability of PCI-Express as an interconnect technology for high speed readout. We show th...

Descripción completa

Detalles Bibliográficos
Autores principales:	Durante, Paolo, Neufeld, N, Schwemmer, R, Balbi, G, Marconi, U
Lenguaje:	eng
Publicado:	2015
Materias:	Detectors and Experimental Techniques
Acceso en línea:	https://dx.doi.org/10.1088/1748-0221/10/04/C04018 http://cds.cern.ch/record/2158991

Ejemplares similares

100 Gbps PCI-Express Readout for the LHCb Upgrade
por: Durante, Paolo, et al.
Publicado: (2015)

100Gbps PCI-express readout for the LHCb upgrade
por: Durante, Paolo, et al.
Publicado: (2014)

100Gbps PCI-Express Readout for the LHCb Upgrade
por: Durante, P
Publicado: (2014)

RDMA Optimizations on Top of 100 Gbps Ethernet for the Upgraded Data Acquisition System of LHCb
por: Vőneki, Balázs, et al.
Publicado: (2018)

A Multi-Channel PCI Express Readout Board Proposal for the Pixel Upgrade at LHC
por: Gabrielli, Alessandro, et al.
Publicado: (2018)

The LHCb DAQ Upgrade for LHC Run3
por: Colombo, Tommaso, et al.
Publicado: (2019)

Evaluation of 100 Gb/s LAN networks for the LHCb DAQ upgrade
por: Vőneki, Balázs, et al.
Publicado: (2016)

A first look at 100 Gbps LAN technologies, with an emphasis on future DAQ applications.
por: Otto, Adam, et al.
Publicado: (2015)

The readout supervisor firmware for controlling the upgraded LHCb detector and readout system
por: Alessio, Federico, et al.
Publicado: (2018)

Advanced readout controller for PCI-based test systems of LHCb
por: Guirao, Angel, et al.
Publicado: (2003)

An Evaluation of 100-Gb/s LAN Networks for the LHCb DAQ Upgrade
por: Valat, Sébastien, et al.
Publicado: (2017)

A Serializer ASIC at 5 Gbps for Detector Front-end Electronics Readout
por: Gong, D, et al.
Publicado: (2010)

A Serializer ASIC at 5 Gbps for Detector Front-end Electronics Readout
por: Ye, J
Publicado: (2010)

A PCIe Gen3 based readout for the LHCb upgrade
por: Bellato, M, et al.
Publicado: (2013)

Particle Identification on an FPGA Accelerated Compute Platform for the LHCb Upgrade
por: Fäerber, Christian, et al.
Publicado: (2017)

Management of the LHCb readout network
por: Liu, Guo-Ming, et al.
Publicado: (2010)

PACIFIC: SiPM readout ASIC for LHCb upgrade
por: de Cos, José Mazorra, et al.
Publicado: (2018)

A PCIe GEn3 based readout for the LHCb upgrade
por: Marconi, U, et al.
Publicado: (2013)

Beam, background and luminosity monitoring in LHCb and upgrade of the LHCb fast readout control
por: Alessio, Federico
Publicado: (2011)

A new readout control system for the LHCb upgrade at CERN
por: Alessio, Federico, et al.
Publicado: (2012)

Trigger-less readout architecture for the upgrade of the LHCb experiment at CERN
por: Alessio, F
Publicado: (2013)

A Terabit Readout System for the LHCb VELO Upgrade I
por: Fernández Prieto, Antonio, et al.
Publicado: (Nov.)

PACIFIC: the readout ASIC for the SciFi Tracker of the upgraded LHCb detector
por: Mazorra, J, et al.
Publicado: (2016)

Radiation-tolerant IP-cores for 2Gbps serial links for the data readout in future LHC experiments
por: Brewer, F, et al.
Publicado: (2016)

8-Gbps-per-channel radiation-tolerant VCSEL drivers for the LHC detector upgrade
por: Li, X, et al.
Publicado: (2015)

Large-Scale DAQ Tests for the LHCb Upgrade
por: Manzali, Matteo, et al.
Publicado: (2017)

Large-scale DAQ tests for the LHCb upgrade
por: Falabella, Antonio, et al.
Publicado: (2016)

Acceleration of an Particle Identification Algorithm Used for the LHCb Upgrade with the New Intel® Xeon®-FPGA
por: Färber, Christian, et al.
Publicado: (2018)

The 40 MHz trigger-less DAQ for the LHCb Upgrade
por: Campora Perez, D H, et al.
Publicado: (2016)

Technological Aspect of the Trigger-Less Readout Architecture for the LHCb Upgrade at CERN
por: Vouters, G
Publicado: (2013)

Readout Control Specifications for the Front-End and Back-End of the LHCb Upgrade
por: Alessio, F, et al.
Publicado: (2014)

Preliminary Specification of a Silicon Strip Readout Chip for the LHCb Upgrade
por: Parkes, Christopher, et al.
Publicado: (2012)

Phase I Upgrade of the Readout System of the Vertex Detector at the LHCb Experiment
por: Prieto, Antonio Fernández, et al.
Publicado: (2020)

The readout system for the LHCb Outer Tracker
por: Wiedner, D, et al.
Publicado: (2006)

RDMA optimizations on top of 100 Gbps Ethernet for the upgraded data acquisition system of LHCb
por: Voneki, Balazs
Publicado: (2017)

The LHCb readout system and real-time event management
por: Alessio, F, et al.
Publicado: (2010)

The 40 MHz trigger-less DAQ for the LHCb upgrade
por: Falabella, A, et al.
Publicado: (2017)

MiniDAQ1: A Compact Data Acquisition System for GBT Readout over 10G Ethernet at LHCb
por: Durante, Paolo, et al.
Publicado: (2018)

The InfiniBand based Event Builder implementation for the LHCb upgrade
por: Falabella, A, et al.
Publicado: (2017)

The SALT—Readout ASIC for Silicon Strip Sensors of Upstream Tracker in the Upgraded LHCb Experiment
por: Beteta, Carlos Abellan, et al.
Publicado: (2021)

Cannot write session to /tmp/vufind_sessions/sess_c0vc9fnpq5tcghas9g1rv1d7kv