100Gbps PCI-express readout for the LHCb upgrade

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We present a new data acquisition system under development for the next upgrade of the LHCb experiment at CERN. We focus in particular on the design of a new generation of readout boards, the PCIe40, and on the viability of PCI-express as an interconnect technology for high speed readout. We show th...

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Detalles Bibliográficos
Autores principales: Durante, Paolo, Neufeld, Niko, Schwemmer, Rainer, Marconi, Umberto, Balbi, Gabriele, Lax, Ignazio
Lenguaje:eng
Publicado: 2014
Materias:
Detectors and Experimental Techniques
Computing and Computers
Acceso en línea:https://dx.doi.org/10.1109/RTC.2014.7097492
http://cds.cern.ch/record/2198343
Descripción
Sumario:We present a new data acquisition system under development for the next upgrade of the LHCb experiment at CERN. We focus in particular on the design of a new generation of readout boards, the PCIe40, and on the viability of PCI-express as an interconnect technology for high speed readout. We show throughput measurements across the PCI-express bus on Altera Stratix 5 devices, using Direct Memory Access. Finally we discuss hardware and software design considerations necessary to achieve a throughput of 100Gbps per readout board.

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