100Gbps PCI-express readout for the LHCb upgrade

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We present a new data acquisition system under development for the next upgrade of the LHCb experiment at CERN. We focus in particular on the design of a new generation of readout boards, the PCIe40, and on the viability of PCI-express as an interconnect technology for high speed readout. We show th...

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Autores principales: Durante, Paolo, Neufeld, Niko, Schwemmer, Rainer, Marconi, Umberto, Balbi, Gabriele, Lax, Ignazio
Lenguaje:eng
Publicado: 2014
Materias:
Detectors and Experimental Techniques
Computing and Computers
Acceso en línea:https://dx.doi.org/10.1109/RTC.2014.7097492
http://cds.cern.ch/record/2198343
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author Durante, Paolo
Neufeld, Niko
Schwemmer, Rainer
Marconi, Umberto
Balbi, Gabriele
Lax, Ignazio
author_facet Durante, Paolo
Neufeld, Niko
Schwemmer, Rainer
Marconi, Umberto
Balbi, Gabriele
Lax, Ignazio
author_sort Durante, Paolo
collection CERN
description We present a new data acquisition system under development for the next upgrade of the LHCb experiment at CERN. We focus in particular on the design of a new generation of readout boards, the PCIe40, and on the viability of PCI-express as an interconnect technology for high speed readout. We show throughput measurements across the PCI-express bus on Altera Stratix 5 devices, using Direct Memory Access. Finally we discuss hardware and software design considerations necessary to achieve a throughput of 100Gbps per readout board.
id oai-inspirehep.net-1367431
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2014
record_format invenio
spelling oai-inspirehep.net-13674312019-09-30T06:29:59Zdoi:10.1109/RTC.2014.7097492http://cds.cern.ch/record/2198343engDurante, PaoloNeufeld, NikoSchwemmer, RainerMarconi, UmbertoBalbi, GabrieleLax, Ignazio100Gbps PCI-express readout for the LHCb upgradeDetectors and Experimental TechniquesComputing and ComputersWe present a new data acquisition system under development for the next upgrade of the LHCb experiment at CERN. We focus in particular on the design of a new generation of readout boards, the PCIe40, and on the viability of PCI-express as an interconnect technology for high speed readout. We show throughput measurements across the PCI-express bus on Altera Stratix 5 devices, using Direct Memory Access. Finally we discuss hardware and software design considerations necessary to achieve a throughput of 100Gbps per readout board.oai:inspirehep.net:13674312014
spellingShingle Detectors and Experimental Techniques
Computing and Computers
Durante, Paolo
Neufeld, Niko
Schwemmer, Rainer
Marconi, Umberto
Balbi, Gabriele
Lax, Ignazio
100Gbps PCI-express readout for the LHCb upgrade
title 100Gbps PCI-express readout for the LHCb upgrade
title_full 100Gbps PCI-express readout for the LHCb upgrade
title_fullStr 100Gbps PCI-express readout for the LHCb upgrade
title_full_unstemmed 100Gbps PCI-express readout for the LHCb upgrade
title_short 100Gbps PCI-express readout for the LHCb upgrade
title_sort 100gbps pci-express readout for the lhcb upgrade
topic Detectors and Experimental Techniques
Computing and Computers
url https://dx.doi.org/10.1109/RTC.2014.7097492
http://cds.cern.ch/record/2198343
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AT neufeldniko 100gbpspciexpressreadoutforthelhcbupgrade
AT schwemmerrainer 100gbpspciexpressreadoutforthelhcbupgrade
AT marconiumberto 100gbpspciexpressreadoutforthelhcbupgrade
AT balbigabriele 100gbpspciexpressreadoutforthelhcbupgrade
AT laxignazio 100gbpspciexpressreadoutforthelhcbupgrade

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