Evaluating the transport layer of the ALFA framework for the Intel(®) Xeon Phi(™) Coprocessor

The ALFA framework supports the software development of major High Energy Physics experiments. As part of our research effort to optimize the transport layer of ALFA, we focus on profiling its data transfer performance for inter-node communication on the Intel Xeon Phi Coprocessor. In this article w...

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Detalles Bibliográficos
Autores principales: Santogidis, Aram, Hirstius, Andreas, Lalis, Spyros
Lenguaje:eng
Publicado: 2015
Materias:
Computing and Computers
Acceso en línea:https://dx.doi.org/10.1088/1742-6596/664/9/092021
http://cds.cern.ch/record/2134650
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author Santogidis, Aram
Hirstius, Andreas
Lalis, Spyros
author_facet Santogidis, Aram
Hirstius, Andreas
Lalis, Spyros
author_sort Santogidis, Aram
collection CERN
description The ALFA framework supports the software development of major High Energy Physics experiments. As part of our research effort to optimize the transport layer of ALFA, we focus on profiling its data transfer performance for inter-node communication on the Intel Xeon Phi Coprocessor. In this article we present the collected performance measurements with the related analysis of the results. The optimization opportunities that are discovered, help us to formulate the future plans of enabling high performance data transfer for ALFA on the Intel Xeon Phi architecture.
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institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2015
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spelling oai-inspirehep.net-14140962022-08-10T13:01:08Zdoi:10.1088/1742-6596/664/9/092021http://cds.cern.ch/record/2134650engSantogidis, AramHirstius, AndreasLalis, SpyrosEvaluating the transport layer of the ALFA framework for the Intel(®) Xeon Phi(™) CoprocessorComputing and ComputersThe ALFA framework supports the software development of major High Energy Physics experiments. As part of our research effort to optimize the transport layer of ALFA, we focus on profiling its data transfer performance for inter-node communication on the Intel Xeon Phi Coprocessor. In this article we present the collected performance measurements with the related analysis of the results. The optimization opportunities that are discovered, help us to formulate the future plans of enabling high performance data transfer for ALFA on the Intel Xeon Phi architecture.oai:inspirehep.net:14140962015
spellingShingle Computing and Computers
Santogidis, Aram
Hirstius, Andreas
Lalis, Spyros
Evaluating the transport layer of the ALFA framework for the Intel(®) Xeon Phi(™) Coprocessor
title Evaluating the transport layer of the ALFA framework for the Intel(®) Xeon Phi(™) Coprocessor
title_full Evaluating the transport layer of the ALFA framework for the Intel(®) Xeon Phi(™) Coprocessor
title_fullStr Evaluating the transport layer of the ALFA framework for the Intel(®) Xeon Phi(™) Coprocessor
title_full_unstemmed Evaluating the transport layer of the ALFA framework for the Intel(®) Xeon Phi(™) Coprocessor
title_short Evaluating the transport layer of the ALFA framework for the Intel(®) Xeon Phi(™) Coprocessor
title_sort evaluating the transport layer of the alfa framework for the intel(®) xeon phi(™) coprocessor
topic Computing and Computers
url https://dx.doi.org/10.1088/1742-6596/664/9/092021
http://cds.cern.ch/record/2134650
work_keys_str_mv AT santogidisaram evaluatingthetransportlayerofthealfaframeworkfortheintelxeonphicoprocessor
AT hirstiusandreas evaluatingthetransportlayerofthealfaframeworkfortheintelxeonphicoprocessor
AT lalisspyros evaluatingthetransportlayerofthealfaframeworkfortheintelxeonphicoprocessor

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