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Evaluating the power efficiency and performance of multi-core platforms using HEP workloads
As Moore's Law drives the silicon industry towards higher transistor counts, processor designs are becoming more and more complex. The area of development includes core count, execution ports, vector units, uncore architecture and finally instruction sets. This increasing complexity leads us to...
| Autores principales: | , |
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| Lenguaje: | eng |
| Publicado: |
2015
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.1088/1742-6596/664/9/092024 http://cds.cern.ch/record/2134653 |