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A Pattern Recognition Mezzanine based on Associative Memory and FPGA technology for Level 1 Track Triggers for the HL-LHC upgrade
The increment of luminosity at HL-LHC will require the introduction of tracker information at Level-1 trigger system for the experiments in order to maintain an acceptable trigger rate for selecting interesting events despite the one order of increased magnitude in the minimum bias interactions. In...
Autores principales: | , , , , , , , , , , , , , , |
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Lenguaje: | eng |
Publicado: |
2016
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.1088/1748-0221/11/02/C02063 http://cds.cern.ch/record/2266416 |