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Level Zero Trigger processor for the ultra rare kaon decay experiment—NA62
n the NA62 experiment at CERN-SPS the communication between detectors and the Lowest Level (L0) trigger processor is performed via Ethernet packets, using the UDP protocol. The L0 Trigger Processor handles the signals from sub-detectors that take part to the trigger generation. In order to choose th...
Autores principales: | , , , , , , |
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Lenguaje: | eng |
Publicado: |
2016
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.1088/1748-0221/11/02/C02037 http://cds.cern.ch/record/2252372 |
_version_ | 1780953542124634112 |
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author | Chiozzi, S Gamberini, E Gianoli, A Mila, G Neri, I Petrucci, F Soldi, D |
author_facet | Chiozzi, S Gamberini, E Gianoli, A Mila, G Neri, I Petrucci, F Soldi, D |
author_sort | Chiozzi, S |
collection | CERN |
description | n the NA62 experiment at CERN-SPS the communication between detectors and the Lowest Level (L0) trigger processor is performed via Ethernet packets, using the UDP protocol. The L0 Trigger Processor handles the signals from sub-detectors that take part to the trigger generation. In order to choose the best solution for its realization, two different approaches have been implemented. The first approach is fully based on a FPGA device while the second one joins an off-the-shelf PC to the FPGA. The performance of the two systems will be discussed and compared. |
id | oai-inspirehep.net-1427779 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 2016 |
record_format | invenio |
spelling | oai-inspirehep.net-14277792022-08-10T12:36:09Zdoi:10.1088/1748-0221/11/02/C02037http://cds.cern.ch/record/2252372engChiozzi, SGamberini, EGianoli, AMila, GNeri, IPetrucci, FSoldi, DLevel Zero Trigger processor for the ultra rare kaon decay experiment—NA62Detectors and Experimental Techniquesn the NA62 experiment at CERN-SPS the communication between detectors and the Lowest Level (L0) trigger processor is performed via Ethernet packets, using the UDP protocol. The L0 Trigger Processor handles the signals from sub-detectors that take part to the trigger generation. In order to choose the best solution for its realization, two different approaches have been implemented. The first approach is fully based on a FPGA device while the second one joins an off-the-shelf PC to the FPGA. The performance of the two systems will be discussed and compared.oai:inspirehep.net:14277792016 |
spellingShingle | Detectors and Experimental Techniques Chiozzi, S Gamberini, E Gianoli, A Mila, G Neri, I Petrucci, F Soldi, D Level Zero Trigger processor for the ultra rare kaon decay experiment—NA62 |
title | Level Zero Trigger processor for the ultra rare kaon decay experiment—NA62 |
title_full | Level Zero Trigger processor for the ultra rare kaon decay experiment—NA62 |
title_fullStr | Level Zero Trigger processor for the ultra rare kaon decay experiment—NA62 |
title_full_unstemmed | Level Zero Trigger processor for the ultra rare kaon decay experiment—NA62 |
title_short | Level Zero Trigger processor for the ultra rare kaon decay experiment—NA62 |
title_sort | level zero trigger processor for the ultra rare kaon decay experiment—na62 |
topic | Detectors and Experimental Techniques |
url | https://dx.doi.org/10.1088/1748-0221/11/02/C02037 http://cds.cern.ch/record/2252372 |
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