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100 Gbps PCI-Express Readout for the LHCb Upgrade
We present a new data acquisition system under development for the next upgrade of the LHCb experiment at CERN. We focus in particular on the design of a new common readout board, the PCIe40, and on the viability of PCI-Express as an interconnect technology for high speed readout. We describe a new...
Autores principales: | , , , , , |
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Lenguaje: | eng |
Publicado: |
2015
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.1109/TNS.2015.2441633 http://cds.cern.ch/record/2162476 |
Sumario: | We present a new data acquisition system under development for the next upgrade of the LHCb experiment at CERN. We focus in particular on the design of a new common readout board, the PCIe40, and on the viability of PCI-Express as an interconnect technology for high speed readout. We describe a new high-performance DMA controller for data acquisition, implemented on an FPGA, coupled with a custom software module for the Linux kernel. Lastly, we describe how these components can be leveraged to achieve a throughput of 100 Gbit/s per readout board. |
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