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A low-power low-noise synchronous pixel front-end chain in 65 nm CMOS technology with local fast ToT encoding and autozeroing for extreme rate and radiation at HL-LHC
A low-power and low-noise synchronous front-end chain in a commercial 65 nm CMOS technology suitable for the future pixel upgrades at the CERN Large Hadron Collider (LHC) is presented. A shaper-less Charge-Sensitive Amplifier (CSA) with constant current feedback provides triangular pulse shaping for...
| Autores principales: | , , , , |
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| Lenguaje: | eng |
| Publicado: |
2016
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.1109/NSSMIC.2015.7581969 http://cds.cern.ch/record/2287314 |