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Advanced power analysis methodology targeted to the optimization of a digital pixel readout chip design and its critical serial powering system
A dedicated power analysis methodology, based on modern digital design tools and integrated with the VEPIX53 simulation framework developed within RD53 collaboration, is being used to guide vital choices for the design and optimization of the next generation ATLAS and CMS pixel chips and their criti...
| Autores principales: | , , , , , |
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| Lenguaje: | eng |
| Publicado: |
2017
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.1088/1748-0221/12/02/C02017 http://cds.cern.ch/record/2275132 |