Cargando…

Overview and Future Developments of the intelligent, FPGA-based DAQ (iFDAQ) of COMPASS

Modern experiments in high energy physics impose great demands on reliability, efficiency, and data rate of Data Acquisition Systems (DAQ). In order to address these needs, we present a versa- tile and scalable DAQ which executes the event building task entirely in FPGA modules. In 2014, the intelli...

Descripción completa

Detalles Bibliográficos
Autores principales: Steffen, Dominik, Bai, Yunpeng, Bodlak, Martin, Frolov, Vladimir, Huber, Stefan, Jary, Vladimir, Konorov, Igor, Levit, Dmytro, Novy, Josef, Subrt, Ondrej, Virius, Miroslav
Lenguaje:eng
Publicado: SISSA 2016
Materias:
Acceso en línea:https://dx.doi.org/10.22323/1.282.0912
http://cds.cern.ch/record/2265892
_version_ 1780954516939603968
author Steffen, Dominik
Bai, Yunpeng
Bodlak, Martin
Frolov, Vladimir
Huber, Stefan
Jary, Vladimir
Konorov, Igor
Levit, Dmytro
Novy, Josef
Subrt, Ondrej
Virius, Miroslav
author_facet Steffen, Dominik
Bai, Yunpeng
Bodlak, Martin
Frolov, Vladimir
Huber, Stefan
Jary, Vladimir
Konorov, Igor
Levit, Dmytro
Novy, Josef
Subrt, Ondrej
Virius, Miroslav
author_sort Steffen, Dominik
collection CERN
description Modern experiments in high energy physics impose great demands on reliability, efficiency, and data rate of Data Acquisition Systems (DAQ). In order to address these needs, we present a versa- tile and scalable DAQ which executes the event building task entirely in FPGA modules. In 2014, the intelligent FPGA-based DAQ (iFDAQ) was deployed at the COMPASS experiment located at the Super Proton Synchrotron (SPS) at CERN. The core of the iFDAQ is its hardware Event Builder (EB), which consists of up to nine custom designed FPGA modules complying with the μ TCA/AMC standard. The EB replaced 30 distributed online computers and around 100 PCI cards increasing compactness, scalability, reliability, and bandwidth compared to the previous system. The iFDAQ in the configuration of COMPASS provides a bandwidth of up to 500 MB/s of sustained rate. By buffering data on different levels, the system exploits the spill structure of the SPS beam and averages the maximum on-spill data rate of 1.5 GB/s over the whole SPS duty cycle. It can even handle peak data rates of 8 GB/s. Its Run Control Configuration and Readout (RCCAR) software offers native user-friendly control and monitoring tools and together with the firmware of the modules provides built-in intelligence like self-diagnostics, data consis- tency checks, and front-end error handling. From 2017, all involved point-to-point high-speed links between front-end electronics, the hardware EB, and the readout computers will be wired via a passive programmable crosspoint switch. Thus, multiple event building topologies can be configured to adapt to different system sizes and communication patterns.
id oai-inspirehep.net-1596793
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2016
publisher SISSA
record_format invenio
spelling oai-inspirehep.net-15967932019-10-15T15:23:22Zdoi:10.22323/1.282.0912http://cds.cern.ch/record/2265892engSteffen, DominikBai, YunpengBodlak, MartinFrolov, VladimirHuber, StefanJary, VladimirKonorov, IgorLevit, DmytroNovy, JosefSubrt, OndrejVirius, MiroslavOverview and Future Developments of the intelligent, FPGA-based DAQ (iFDAQ) of COMPASSDetectors and Experimental TechniquesComputing and ComputersModern experiments in high energy physics impose great demands on reliability, efficiency, and data rate of Data Acquisition Systems (DAQ). In order to address these needs, we present a versa- tile and scalable DAQ which executes the event building task entirely in FPGA modules. In 2014, the intelligent FPGA-based DAQ (iFDAQ) was deployed at the COMPASS experiment located at the Super Proton Synchrotron (SPS) at CERN. The core of the iFDAQ is its hardware Event Builder (EB), which consists of up to nine custom designed FPGA modules complying with the μ TCA/AMC standard. The EB replaced 30 distributed online computers and around 100 PCI cards increasing compactness, scalability, reliability, and bandwidth compared to the previous system. The iFDAQ in the configuration of COMPASS provides a bandwidth of up to 500 MB/s of sustained rate. By buffering data on different levels, the system exploits the spill structure of the SPS beam and averages the maximum on-spill data rate of 1.5 GB/s over the whole SPS duty cycle. It can even handle peak data rates of 8 GB/s. Its Run Control Configuration and Readout (RCCAR) software offers native user-friendly control and monitoring tools and together with the firmware of the modules provides built-in intelligence like self-diagnostics, data consis- tency checks, and front-end error handling. From 2017, all involved point-to-point high-speed links between front-end electronics, the hardware EB, and the readout computers will be wired via a passive programmable crosspoint switch. Thus, multiple event building topologies can be configured to adapt to different system sizes and communication patterns.SISSAoai:inspirehep.net:15967932016
spellingShingle Detectors and Experimental Techniques
Computing and Computers
Steffen, Dominik
Bai, Yunpeng
Bodlak, Martin
Frolov, Vladimir
Huber, Stefan
Jary, Vladimir
Konorov, Igor
Levit, Dmytro
Novy, Josef
Subrt, Ondrej
Virius, Miroslav
Overview and Future Developments of the intelligent, FPGA-based DAQ (iFDAQ) of COMPASS
title Overview and Future Developments of the intelligent, FPGA-based DAQ (iFDAQ) of COMPASS
title_full Overview and Future Developments of the intelligent, FPGA-based DAQ (iFDAQ) of COMPASS
title_fullStr Overview and Future Developments of the intelligent, FPGA-based DAQ (iFDAQ) of COMPASS
title_full_unstemmed Overview and Future Developments of the intelligent, FPGA-based DAQ (iFDAQ) of COMPASS
title_short Overview and Future Developments of the intelligent, FPGA-based DAQ (iFDAQ) of COMPASS
title_sort overview and future developments of the intelligent, fpga-based daq (ifdaq) of compass
topic Detectors and Experimental Techniques
Computing and Computers
url https://dx.doi.org/10.22323/1.282.0912
http://cds.cern.ch/record/2265892
work_keys_str_mv AT steffendominik overviewandfuturedevelopmentsoftheintelligentfpgabaseddaqifdaqofcompass
AT baiyunpeng overviewandfuturedevelopmentsoftheintelligentfpgabaseddaqifdaqofcompass
AT bodlakmartin overviewandfuturedevelopmentsoftheintelligentfpgabaseddaqifdaqofcompass
AT frolovvladimir overviewandfuturedevelopmentsoftheintelligentfpgabaseddaqifdaqofcompass
AT huberstefan overviewandfuturedevelopmentsoftheintelligentfpgabaseddaqifdaqofcompass
AT jaryvladimir overviewandfuturedevelopmentsoftheintelligentfpgabaseddaqifdaqofcompass
AT konorovigor overviewandfuturedevelopmentsoftheintelligentfpgabaseddaqifdaqofcompass
AT levitdmytro overviewandfuturedevelopmentsoftheintelligentfpgabaseddaqifdaqofcompass
AT novyjosef overviewandfuturedevelopmentsoftheintelligentfpgabaseddaqifdaqofcompass
AT subrtondrej overviewandfuturedevelopmentsoftheintelligentfpgabaseddaqifdaqofcompass
AT viriusmiroslav overviewandfuturedevelopmentsoftheintelligentfpgabaseddaqifdaqofcompass