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A First Level Calorimeter Trigger Processor for the Large Hadron Collider
As part of an R&D; project to study first-level calorimeter triggers for the LHC, a preliminary design of a bit-parallel digital trigger processor system is presented in this note. The trigger processor will process 4096 electromagnetic and 4096 hadronic trigger cells, selecting events on the b...
Autor principal: | Perera, Viraj |
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Lenguaje: | eng |
Publicado: |
1993
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Materias: | |
Acceso en línea: | http://cds.cern.ch/record/2288302 |
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