A Flash Analog-to-Digital Converter for Trigger Tests with the ATLAS Calorimetry

A system of FADC modules was developed as part of the RD27 project. Each FADC board is a standard 6U VME slave module, containing 4 channels of Analog-to-Digital Conversion with 8 bit resolution. An external clock input allows sampling rates of more than 80 MHz. The key feature is the front-panel output of digitized data in real time to a subsequent trigger logic. In addition each FADC channel is equipped with a scrolling memory of 256 byte. The last 256 FADC samples can be read out, when digitization is stopped by a Gate signal. The memory is also 'write' accessible from VME. This permits writing of real test-beam data back to the memories. A special operating mode allows 'playback' of those data to the front-panel connector for tests of trigger logic in the laboratory.