A Flash Analog-to-Digital Converter for Trigger Tests with the ATLAS Calorimetry

A system of FADC modules was developed as part of the RD27 project. Each FADC board is a standard 6U VME slave module, containing 4 channels of Analog-to-Digital Conversion with 8 bit resolution. An external clock input allows sampling rates of more than 80 MHz. The key feature is the front-panel ou...

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Detalles Bibliográficos
Autores principales: Hanke, P, Krause, J, Rensch, B, Schmitt, K
Lenguaje:eng
Publicado: 1995
Materias:
Accelerators and Storage Rings
Detectors and Experimental Techniques
Acceso en línea:http://cds.cern.ch/record/2288307
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author Hanke, P
Krause, J
Rensch, B
Schmitt, K
author_facet Hanke, P
Krause, J
Rensch, B
Schmitt, K
author_sort Hanke, P
collection CERN
description A system of FADC modules was developed as part of the RD27 project. Each FADC board is a standard 6U VME slave module, containing 4 channels of Analog-to-Digital Conversion with 8 bit resolution. An external clock input allows sampling rates of more than 80 MHz. The key feature is the front-panel output of digitized data in real time to a subsequent trigger logic. In addition each FADC channel is equipped with a scrolling memory of 256 byte. The last 256 FADC samples can be read out, when digitization is stopped by a Gate signal. The memory is also 'write' accessible from VME. This permits writing of real test-beam data back to the memories. A special operating mode allows 'playback' of those data to the front-panel connector for tests of trigger logic in the laboratory.
id oai-inspirehep.net-1629496
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 1995
record_format invenio
spelling oai-inspirehep.net-16294962019-09-30T06:29:59Zhttp://cds.cern.ch/record/2288307engHanke, PKrause, JRensch, BSchmitt, KA Flash Analog-to-Digital Converter for Trigger Tests with the ATLAS CalorimetryAccelerators and Storage RingsDetectors and Experimental TechniquesA system of FADC modules was developed as part of the RD27 project. Each FADC board is a standard 6U VME slave module, containing 4 channels of Analog-to-Digital Conversion with 8 bit resolution. An external clock input allows sampling rates of more than 80 MHz. The key feature is the front-panel output of digitized data in real time to a subsequent trigger logic. In addition each FADC channel is equipped with a scrolling memory of 256 byte. The last 256 FADC samples can be read out, when digitization is stopped by a Gate signal. The memory is also 'write' accessible from VME. This permits writing of real test-beam data back to the memories. A special operating mode allows 'playback' of those data to the front-panel connector for tests of trigger logic in the laboratory.RD-27 Note 41oai:inspirehep.net:16294961995
spellingShingle Accelerators and Storage Rings
Detectors and Experimental Techniques
Hanke, P
Krause, J
Rensch, B
Schmitt, K
A Flash Analog-to-Digital Converter for Trigger Tests with the ATLAS Calorimetry
title A Flash Analog-to-Digital Converter for Trigger Tests with the ATLAS Calorimetry
title_full A Flash Analog-to-Digital Converter for Trigger Tests with the ATLAS Calorimetry
title_fullStr A Flash Analog-to-Digital Converter for Trigger Tests with the ATLAS Calorimetry
title_full_unstemmed A Flash Analog-to-Digital Converter for Trigger Tests with the ATLAS Calorimetry
title_short A Flash Analog-to-Digital Converter for Trigger Tests with the ATLAS Calorimetry
title_sort flash analog-to-digital converter for trigger tests with the atlas calorimetry
topic Accelerators and Storage Rings
Detectors and Experimental Techniques
url http://cds.cern.ch/record/2288307
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