Low-power optimisation of a pixel array architecture for next generation High Energy Physics detectors

A large scale pixel readout chip is being designed by the RD53 Collaboration, in order to prove the suitability of 65 nm technology for the extreme operating conditions foreseen for the High Luminosity upgrades of the ATLAS and CMS experiments at CERN. The use of advanced digital design and simulati...

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Detalles Bibliográficos
Autores principales: Marconi, Sara, Hemperek, Tomasz, Placidi, Pisana, Scorzoni, Andrea, Conti, Elia, Christiansen, Jorgen
Lenguaje:eng
Publicado: 2017
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1109/PRIME.2017.7974142
http://cds.cern.ch/record/2314731
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author Marconi, Sara
Hemperek, Tomasz
Placidi, Pisana
Scorzoni, Andrea
Conti, Elia
Christiansen, Jorgen
author_facet Marconi, Sara
Hemperek, Tomasz
Placidi, Pisana
Scorzoni, Andrea
Conti, Elia
Christiansen, Jorgen
author_sort Marconi, Sara
collection CERN
description A large scale pixel readout chip is being designed by the RD53 Collaboration, in order to prove the suitability of 65 nm technology for the extreme operating conditions foreseen for the High Luminosity upgrades of the ATLAS and CMS experiments at CERN. The use of advanced digital design and simulation tools is essential to guide architectural and implementation choices for the design and optimisation of pixel chips which will be powered from a serial powering scheme. In this work, low power design techniques are reviewed and critically selected based on the requirements of the target application. Chosen techniques are adopted and results of the low power optimisation are presented for a basic unit of the system.
id oai-inspirehep.net-1650740
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2017
record_format invenio
spelling oai-inspirehep.net-16507402019-09-30T06:29:59Zdoi:10.1109/PRIME.2017.7974142http://cds.cern.ch/record/2314731engMarconi, SaraHemperek, TomaszPlacidi, PisanaScorzoni, AndreaConti, EliaChristiansen, JorgenLow-power optimisation of a pixel array architecture for next generation High Energy Physics detectorsDetectors and Experimental TechniquesA large scale pixel readout chip is being designed by the RD53 Collaboration, in order to prove the suitability of 65 nm technology for the extreme operating conditions foreseen for the High Luminosity upgrades of the ATLAS and CMS experiments at CERN. The use of advanced digital design and simulation tools is essential to guide architectural and implementation choices for the design and optimisation of pixel chips which will be powered from a serial powering scheme. In this work, low power design techniques are reviewed and critically selected based on the requirements of the target application. Chosen techniques are adopted and results of the low power optimisation are presented for a basic unit of the system.oai:inspirehep.net:16507402017
spellingShingle Detectors and Experimental Techniques
Marconi, Sara
Hemperek, Tomasz
Placidi, Pisana
Scorzoni, Andrea
Conti, Elia
Christiansen, Jorgen
Low-power optimisation of a pixel array architecture for next generation High Energy Physics detectors
title Low-power optimisation of a pixel array architecture for next generation High Energy Physics detectors
title_full Low-power optimisation of a pixel array architecture for next generation High Energy Physics detectors
title_fullStr Low-power optimisation of a pixel array architecture for next generation High Energy Physics detectors
title_full_unstemmed Low-power optimisation of a pixel array architecture for next generation High Energy Physics detectors
title_short Low-power optimisation of a pixel array architecture for next generation High Energy Physics detectors
title_sort low-power optimisation of a pixel array architecture for next generation high energy physics detectors
topic Detectors and Experimental Techniques
url https://dx.doi.org/10.1109/PRIME.2017.7974142
http://cds.cern.ch/record/2314731
work_keys_str_mv AT marconisara lowpoweroptimisationofapixelarrayarchitecturefornextgenerationhighenergyphysicsdetectors
AT hemperektomasz lowpoweroptimisationofapixelarrayarchitecturefornextgenerationhighenergyphysicsdetectors
AT placidipisana lowpoweroptimisationofapixelarrayarchitecturefornextgenerationhighenergyphysicsdetectors
AT scorzoniandrea lowpoweroptimisationofapixelarrayarchitecturefornextgenerationhighenergyphysicsdetectors
AT contielia lowpoweroptimisationofapixelarrayarchitecturefornextgenerationhighenergyphysicsdetectors
AT christiansenjorgen lowpoweroptimisationofapixelarrayarchitecturefornextgenerationhighenergyphysicsdetectors

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