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Experimental Methods and Results for the Evaluation of Triple Modular Redundancy SEU Mitigation Techniques with the Xilinx Kintex-7 FPGA

This paper describes experimental methods and results for the evaluation of triple modular redundancy SEU mitigation techniques with the Xilinx Kintex-7 FPGA. Testing was performed both in proton irradiation and fault injection tests.

Detalles Bibliográficos
Autores principales: Sielewicz, Krzysztof M, Rinella, Gianluca Aglieri, Bonora, Matthias, Giubilato, Piero, Lupi, Matteo, Rossewij, Marcus J, Schambach, Joachim, Vanat, Tomas
Lenguaje:eng
Publicado: 2017
Materias:
Acceso en línea:https://dx.doi.org/10.1109/NSREC.2017.8115451
http://cds.cern.ch/record/2303669
_version_ 1780957470043144192
author Sielewicz, Krzysztof M
Rinella, Gianluca Aglieri
Bonora, Matthias
Giubilato, Piero
Lupi, Matteo
Rossewij, Marcus J
Schambach, Joachim
Vanat, Tomas
author_facet Sielewicz, Krzysztof M
Rinella, Gianluca Aglieri
Bonora, Matthias
Giubilato, Piero
Lupi, Matteo
Rossewij, Marcus J
Schambach, Joachim
Vanat, Tomas
author_sort Sielewicz, Krzysztof M
collection CERN
description This paper describes experimental methods and results for the evaluation of triple modular redundancy SEU mitigation techniques with the Xilinx Kintex-7 FPGA. Testing was performed both in proton irradiation and fault injection tests.
id oai-inspirehep.net-1650764
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2017
record_format invenio
spelling oai-inspirehep.net-16507642019-09-30T06:29:59Zdoi:10.1109/NSREC.2017.8115451http://cds.cern.ch/record/2303669engSielewicz, Krzysztof MRinella, Gianluca AglieriBonora, MatthiasGiubilato, PieroLupi, MatteoRossewij, Marcus JSchambach, JoachimVanat, TomasExperimental Methods and Results for the Evaluation of Triple Modular Redundancy SEU Mitigation Techniques with the Xilinx Kintex-7 FPGADetectors and Experimental TechniquesThis paper describes experimental methods and results for the evaluation of triple modular redundancy SEU mitigation techniques with the Xilinx Kintex-7 FPGA. Testing was performed both in proton irradiation and fault injection tests.oai:inspirehep.net:16507642017
spellingShingle Detectors and Experimental Techniques
Sielewicz, Krzysztof M
Rinella, Gianluca Aglieri
Bonora, Matthias
Giubilato, Piero
Lupi, Matteo
Rossewij, Marcus J
Schambach, Joachim
Vanat, Tomas
Experimental Methods and Results for the Evaluation of Triple Modular Redundancy SEU Mitigation Techniques with the Xilinx Kintex-7 FPGA
title Experimental Methods and Results for the Evaluation of Triple Modular Redundancy SEU Mitigation Techniques with the Xilinx Kintex-7 FPGA
title_full Experimental Methods and Results for the Evaluation of Triple Modular Redundancy SEU Mitigation Techniques with the Xilinx Kintex-7 FPGA
title_fullStr Experimental Methods and Results for the Evaluation of Triple Modular Redundancy SEU Mitigation Techniques with the Xilinx Kintex-7 FPGA
title_full_unstemmed Experimental Methods and Results for the Evaluation of Triple Modular Redundancy SEU Mitigation Techniques with the Xilinx Kintex-7 FPGA
title_short Experimental Methods and Results for the Evaluation of Triple Modular Redundancy SEU Mitigation Techniques with the Xilinx Kintex-7 FPGA
title_sort experimental methods and results for the evaluation of triple modular redundancy seu mitigation techniques with the xilinx kintex-7 fpga
topic Detectors and Experimental Techniques
url https://dx.doi.org/10.1109/NSREC.2017.8115451
http://cds.cern.ch/record/2303669
work_keys_str_mv AT sielewiczkrzysztofm experimentalmethodsandresultsfortheevaluationoftriplemodularredundancyseumitigationtechniqueswiththexilinxkintex7fpga
AT rinellagianlucaaglieri experimentalmethodsandresultsfortheevaluationoftriplemodularredundancyseumitigationtechniqueswiththexilinxkintex7fpga
AT bonoramatthias experimentalmethodsandresultsfortheevaluationoftriplemodularredundancyseumitigationtechniqueswiththexilinxkintex7fpga
AT giubilatopiero experimentalmethodsandresultsfortheevaluationoftriplemodularredundancyseumitigationtechniqueswiththexilinxkintex7fpga
AT lupimatteo experimentalmethodsandresultsfortheevaluationoftriplemodularredundancyseumitigationtechniqueswiththexilinxkintex7fpga
AT rossewijmarcusj experimentalmethodsandresultsfortheevaluationoftriplemodularredundancyseumitigationtechniqueswiththexilinxkintex7fpga
AT schambachjoachim experimentalmethodsandresultsfortheevaluationoftriplemodularredundancyseumitigationtechniqueswiththexilinxkintex7fpga
AT vanattomas experimentalmethodsandresultsfortheevaluationoftriplemodularredundancyseumitigationtechniqueswiththexilinxkintex7fpga