Fixed-latency gigabit serial links in a Xilinx FPGA for the upgrade of the muon spectrometer at the ATLAS experiment

We present an implementation of fixed-latency gigabit serial links in a low-cost Xilinx field-programmable gate array. The implementation is targeted for a data packet router in the upgrade of the ATLAS muon spectrometer. The router serves as a packet switch. It handles up to 12 serial inputs at 4.8...

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Detalles Bibliográficos
Autores principales: Wang, Jinhong, Hu, Xueye, Pinkham, Reid, Hou, Suen, Schwarz, Thomas, Zhu, Junjie, Chapman, J W, Zhou, Bing
Lenguaje:eng
Publicado: 2018
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1109/TNS.2017.2784411
http://cds.cern.ch/record/2310129

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