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A possible Hardware Implementation of the HPC II Level Trigger

Detalles Bibliográficos
Autor principal: Crosetto, D
Lenguaje:eng
Publicado: 1987
Materias:
Acceso en línea:http://cds.cern.ch/record/2625542
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author Crosetto, D
author_facet Crosetto, D
author_sort Crosetto, D
collection CERN
id oai-inspirehep.net-1659456
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 1987
record_format invenio
spelling oai-inspirehep.net-16594562021-07-19T07:27:34Zhttp://cds.cern.ch/record/2625542engCrosetto, DA possible Hardware Implementation of the HPC II Level TriggerDetectors and Experimental TechniquesDELPHI-87-100-DAS-65oai:inspirehep.net:16594561987
spellingShingle Detectors and Experimental Techniques
Crosetto, D
A possible Hardware Implementation of the HPC II Level Trigger
title A possible Hardware Implementation of the HPC II Level Trigger
title_full A possible Hardware Implementation of the HPC II Level Trigger
title_fullStr A possible Hardware Implementation of the HPC II Level Trigger
title_full_unstemmed A possible Hardware Implementation of the HPC II Level Trigger
title_short A possible Hardware Implementation of the HPC II Level Trigger
title_sort possible hardware implementation of the hpc ii level trigger
topic Detectors and Experimental Techniques
url http://cds.cern.ch/record/2625542
work_keys_str_mv AT crosettod apossiblehardwareimplementationofthehpciileveltrigger
AT crosettod possiblehardwareimplementationofthehpciileveltrigger