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Design and simulation of a 65 nm Macro-Pixel Readout ASIC (MPA) for the Pixel-Strip (PS) module of the CMS Outer Tracker detector at the HL-LHC

The MPA is the pixel readout ASIC for the hybrid Pixel-Strip module of the Phase-II CMS Outer Tracker upgrade at the High Luminosity LHC (HL-LHC). It employs a novel technique for identifying high transverse momentum particles and provides this information at 40 $MHz$ rate to the L1-trigger system....

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Detalles Bibliográficos
Autores principales: Ceresa, Davide, Caratelli, Alessandro, Kaplon, Jan, Kloukinas, Kostas, Murdzek, Jan, Scarfi, Simone
Lenguaje:eng
Publicado: SISSA 2017
Materias:
Acceso en línea:https://dx.doi.org/10.22323/1.313.0032
http://cds.cern.ch/record/2312588
_version_ 1780958013560979456
author Ceresa, Davide
Caratelli, Alessandro
Kaplon, Jan
Kloukinas, Kostas
Murdzek, Jan
Scarfi, Simone
author_facet Ceresa, Davide
Caratelli, Alessandro
Kaplon, Jan
Kloukinas, Kostas
Murdzek, Jan
Scarfi, Simone
author_sort Ceresa, Davide
collection CERN
description The MPA is the pixel readout ASIC for the hybrid Pixel-Strip module of the Phase-II CMS Outer Tracker upgrade at the High Luminosity LHC (HL-LHC). It employs a novel technique for identifying high transverse momentum particles and provides this information at 40 $MHz$ rate to the L1-trigger system. The chip also comprises a binary pipeline buffer for the L1-trigger latency, and a data path to support the readout of full events with a maximum trigger rate of 1 $MHz$ and a latency of 12.8 $\mu s$. The design and implementation in a 65 $nm$ CMOS technology of the first prototype ASIC that integrates all functionalities for system level operation with a power density lower than 90 $mW/cm^2$ are presented in this contribution.
id oai-inspirehep.net-1665008
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2017
publisher SISSA
record_format invenio
spelling oai-inspirehep.net-16650082019-10-15T15:21:37Zdoi:10.22323/1.313.0032http://cds.cern.ch/record/2312588engCeresa, DavideCaratelli, AlessandroKaplon, JanKloukinas, KostasMurdzek, JanScarfi, SimoneDesign and simulation of a 65 nm Macro-Pixel Readout ASIC (MPA) for the Pixel-Strip (PS) module of the CMS Outer Tracker detector at the HL-LHCDetectors and Experimental TechniquesThe MPA is the pixel readout ASIC for the hybrid Pixel-Strip module of the Phase-II CMS Outer Tracker upgrade at the High Luminosity LHC (HL-LHC). It employs a novel technique for identifying high transverse momentum particles and provides this information at 40 $MHz$ rate to the L1-trigger system. The chip also comprises a binary pipeline buffer for the L1-trigger latency, and a data path to support the readout of full events with a maximum trigger rate of 1 $MHz$ and a latency of 12.8 $\mu s$. The design and implementation in a 65 $nm$ CMOS technology of the first prototype ASIC that integrates all functionalities for system level operation with a power density lower than 90 $mW/cm^2$ are presented in this contribution.SISSAoai:inspirehep.net:16650082017
spellingShingle Detectors and Experimental Techniques
Ceresa, Davide
Caratelli, Alessandro
Kaplon, Jan
Kloukinas, Kostas
Murdzek, Jan
Scarfi, Simone
Design and simulation of a 65 nm Macro-Pixel Readout ASIC (MPA) for the Pixel-Strip (PS) module of the CMS Outer Tracker detector at the HL-LHC
title Design and simulation of a 65 nm Macro-Pixel Readout ASIC (MPA) for the Pixel-Strip (PS) module of the CMS Outer Tracker detector at the HL-LHC
title_full Design and simulation of a 65 nm Macro-Pixel Readout ASIC (MPA) for the Pixel-Strip (PS) module of the CMS Outer Tracker detector at the HL-LHC
title_fullStr Design and simulation of a 65 nm Macro-Pixel Readout ASIC (MPA) for the Pixel-Strip (PS) module of the CMS Outer Tracker detector at the HL-LHC
title_full_unstemmed Design and simulation of a 65 nm Macro-Pixel Readout ASIC (MPA) for the Pixel-Strip (PS) module of the CMS Outer Tracker detector at the HL-LHC
title_short Design and simulation of a 65 nm Macro-Pixel Readout ASIC (MPA) for the Pixel-Strip (PS) module of the CMS Outer Tracker detector at the HL-LHC
title_sort design and simulation of a 65 nm macro-pixel readout asic (mpa) for the pixel-strip (ps) module of the cms outer tracker detector at the hl-lhc
topic Detectors and Experimental Techniques
url https://dx.doi.org/10.22323/1.313.0032
http://cds.cern.ch/record/2312588
work_keys_str_mv AT ceresadavide designandsimulationofa65nmmacropixelreadoutasicmpaforthepixelstrippsmoduleofthecmsoutertrackerdetectoratthehllhc
AT caratellialessandro designandsimulationofa65nmmacropixelreadoutasicmpaforthepixelstrippsmoduleofthecmsoutertrackerdetectoratthehllhc
AT kaplonjan designandsimulationofa65nmmacropixelreadoutasicmpaforthepixelstrippsmoduleofthecmsoutertrackerdetectoratthehllhc
AT kloukinaskostas designandsimulationofa65nmmacropixelreadoutasicmpaforthepixelstrippsmoduleofthecmsoutertrackerdetectoratthehllhc
AT murdzekjan designandsimulationofa65nmmacropixelreadoutasicmpaforthepixelstrippsmoduleofthecmsoutertrackerdetectoratthehllhc
AT scarfisimone designandsimulationofa65nmmacropixelreadoutasicmpaforthepixelstrippsmoduleofthecmsoutertrackerdetectoratthehllhc