Quad Module Hybrid Development for the ATLAS Pixel Layer Upgrade

A quad chip module hybrid assembled with FE-I4B chips has been fabricated to test performance in a serially powered module chain as would be used in the upgraded ATLAS pixel layer at the High Luminosity LHC. This poster present results of the development of a flex circuit board interface for the qua...

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Detalles Bibliográficos
Autores principales: Dunne, Katherine, Garcia-Sciveres, Maurice, Heim, Timon
Lenguaje:eng
Publicado: SISSA 2018
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.22323/1.313.0065
http://cds.cern.ch/record/2673655
Descripción
Sumario:A quad chip module hybrid assembled with FE-I4B chips has been fabricated to test performance in a serially powered module chain as would be used in the upgraded ATLAS pixel layer at the High Luminosity LHC. This poster present results of the development of a flex circuit board interface for the quad chip modules and system integration tests of modules installed on an I-beam. Experience from these hybrid assemblies will inform the design of a flex hybrid for the new large format readout chip, RD53A, which will be produced in 2017 by the RD53 collaboration.

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