New slow-control FPGA IP for GBT based system and status update of the GBT-FPGA project

The GBT-FPGA, part of the GBT (GigaBit Transceiver) project framework, is a VHDL-based core designed to offer a back-end counterpart to the GBTx ASIC, a radiation tolerant 4.8 Gb/s optical transceiver. The GBT-SCA (Slow Control Adapter) radiation tolerant ASIC is also part of the GBT chipset and is...

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Autores principales: Mendez, Julian Maxime, Baron, Sophie, Caratelli, Alessandro, Leitao, Pedro Vicente
Lenguaje:eng
Publicado: SISSA 2018
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.22323/1.313.0083
http://cds.cern.ch/record/2312287
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author Mendez, Julian Maxime
Baron, Sophie
Caratelli, Alessandro
Leitao, Pedro Vicente
author_facet Mendez, Julian Maxime
Baron, Sophie
Caratelli, Alessandro
Leitao, Pedro Vicente
author_sort Mendez, Julian Maxime
collection CERN
description The GBT-FPGA, part of the GBT (GigaBit Transceiver) project framework, is a VHDL-based core designed to offer a back-end counterpart to the GBTx ASIC, a radiation tolerant 4.8 Gb/s optical transceiver. The GBT-SCA (Slow Control Adapter) radiation tolerant ASIC is also part of the GBT chipset and is used for the slow control in the High Energy Physics experiments. In this context, a new VHDL core named GBT-SC has been designed and released to handle the slow control fields hosted in the serial GBT frame for the GBTx and GBT-SCA. This paper presents the architecture and performance of this new GBT-SC module as well as an outline of recent GBT-FPGA core releases and future plans.
id oai-inspirehep.net-1665039
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2018
publisher SISSA
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spelling oai-inspirehep.net-16650392019-10-15T15:20:35Zdoi:10.22323/1.313.0083http://cds.cern.ch/record/2312287engMendez, Julian MaximeBaron, SophieCaratelli, AlessandroLeitao, Pedro VicenteNew slow-control FPGA IP for GBT based system and status update of the GBT-FPGA projectDetectors and Experimental TechniquesThe GBT-FPGA, part of the GBT (GigaBit Transceiver) project framework, is a VHDL-based core designed to offer a back-end counterpart to the GBTx ASIC, a radiation tolerant 4.8 Gb/s optical transceiver. The GBT-SCA (Slow Control Adapter) radiation tolerant ASIC is also part of the GBT chipset and is used for the slow control in the High Energy Physics experiments. In this context, a new VHDL core named GBT-SC has been designed and released to handle the slow control fields hosted in the serial GBT frame for the GBTx and GBT-SCA. This paper presents the architecture and performance of this new GBT-SC module as well as an outline of recent GBT-FPGA core releases and future plans.SISSAoai:inspirehep.net:16650392018
spellingShingle Detectors and Experimental Techniques
Mendez, Julian Maxime
Baron, Sophie
Caratelli, Alessandro
Leitao, Pedro Vicente
New slow-control FPGA IP for GBT based system and status update of the GBT-FPGA project
title New slow-control FPGA IP for GBT based system and status update of the GBT-FPGA project
title_full New slow-control FPGA IP for GBT based system and status update of the GBT-FPGA project
title_fullStr New slow-control FPGA IP for GBT based system and status update of the GBT-FPGA project
title_full_unstemmed New slow-control FPGA IP for GBT based system and status update of the GBT-FPGA project
title_short New slow-control FPGA IP for GBT based system and status update of the GBT-FPGA project
title_sort new slow-control fpga ip for gbt based system and status update of the gbt-fpga project
topic Detectors and Experimental Techniques
url https://dx.doi.org/10.22323/1.313.0083
http://cds.cern.ch/record/2312287
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AT baronsophie newslowcontrolfpgaipforgbtbasedsystemandstatusupdateofthegbtfpgaproject
AT caratellialessandro newslowcontrolfpgaipforgbtbasedsystemandstatusupdateofthegbtfpgaproject
AT leitaopedrovicente newslowcontrolfpgaipforgbtbasedsystemandstatusupdateofthegbtfpgaproject

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