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A Real-Time Demonstrator for Track Reconstruction in the CMS L1 Track-Trigger System Based on Custom Associative Memories and High-Performance FPGAs
A Real-Time demonstrator based on the ATCA Pulsar-IIB custom board and on the Pattern Recognition Mezzanine (PRM) board has been developed as a flexible platform to test and characterize low-latency algorithms for track reconstruction and L1 Trigger generation in future High Energy Physics experimen...
Autores principales: | , , , , , , , , , , , , , , , |
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Lenguaje: | eng |
Publicado: |
SISSA
2018
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.22323/1.313.0138 http://cds.cern.ch/record/2673659 |
_version_ | 1780962518853746688 |
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author | Fedi, Giacomo Palla, Fabrizio Gentsos, Christos Magalotti, Daniel Modak, Atanu Bilei, Gian Mario Roy Chowdhury, Suvankar Checcucci, Bruno Tcherniakhovski, Denis Galbit, Geoffrey Christian Baulieu, Guillaume Balzer, Matthias Norbert Sander, Oliver Viret, Sebastien Storchi, Loriano Magazzu, Guido |
author_facet | Fedi, Giacomo Palla, Fabrizio Gentsos, Christos Magalotti, Daniel Modak, Atanu Bilei, Gian Mario Roy Chowdhury, Suvankar Checcucci, Bruno Tcherniakhovski, Denis Galbit, Geoffrey Christian Baulieu, Guillaume Balzer, Matthias Norbert Sander, Oliver Viret, Sebastien Storchi, Loriano Magazzu, Guido |
author_sort | Fedi, Giacomo |
collection | CERN |
description | A Real-Time demonstrator based on the ATCA Pulsar-IIB custom board and on the Pattern Recognition Mezzanine (PRM) board has been developed as a flexible platform to test and characterize low-latency algorithms for track reconstruction and L1 Trigger generation in future High Energy Physics experiments. The demonstrator has been extensively used to test and characterize the Track-Trigger algorithms and architecture based on the use of the Associative Memory ASICs and of the PRM cards. The flexibility of the demonstrator makes it suitable to explore other solutions fully based on high-performance FPGA device. |
id | oai-inspirehep.net-1665066 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 2018 |
publisher | SISSA |
record_format | invenio |
spelling | oai-inspirehep.net-16650662021-05-03T07:55:01Zdoi:10.22323/1.313.0138http://cds.cern.ch/record/2673659engFedi, GiacomoPalla, FabrizioGentsos, ChristosMagalotti, DanielModak, AtanuBilei, Gian MarioRoy Chowdhury, SuvankarCheccucci, BrunoTcherniakhovski, DenisGalbit, Geoffrey ChristianBaulieu, GuillaumeBalzer, Matthias NorbertSander, OliverViret, SebastienStorchi, LorianoMagazzu, GuidoA Real-Time Demonstrator for Track Reconstruction in the CMS L1 Track-Trigger System Based on Custom Associative Memories and High-Performance FPGAsDetectors and Experimental TechniquesA Real-Time demonstrator based on the ATCA Pulsar-IIB custom board and on the Pattern Recognition Mezzanine (PRM) board has been developed as a flexible platform to test and characterize low-latency algorithms for track reconstruction and L1 Trigger generation in future High Energy Physics experiments. The demonstrator has been extensively used to test and characterize the Track-Trigger algorithms and architecture based on the use of the Associative Memory ASICs and of the PRM cards. The flexibility of the demonstrator makes it suitable to explore other solutions fully based on high-performance FPGA device.SISSAoai:inspirehep.net:16650662018 |
spellingShingle | Detectors and Experimental Techniques Fedi, Giacomo Palla, Fabrizio Gentsos, Christos Magalotti, Daniel Modak, Atanu Bilei, Gian Mario Roy Chowdhury, Suvankar Checcucci, Bruno Tcherniakhovski, Denis Galbit, Geoffrey Christian Baulieu, Guillaume Balzer, Matthias Norbert Sander, Oliver Viret, Sebastien Storchi, Loriano Magazzu, Guido A Real-Time Demonstrator for Track Reconstruction in the CMS L1 Track-Trigger System Based on Custom Associative Memories and High-Performance FPGAs |
title | A Real-Time Demonstrator for Track Reconstruction in the CMS L1 Track-Trigger System Based on Custom Associative Memories and High-Performance FPGAs |
title_full | A Real-Time Demonstrator for Track Reconstruction in the CMS L1 Track-Trigger System Based on Custom Associative Memories and High-Performance FPGAs |
title_fullStr | A Real-Time Demonstrator for Track Reconstruction in the CMS L1 Track-Trigger System Based on Custom Associative Memories and High-Performance FPGAs |
title_full_unstemmed | A Real-Time Demonstrator for Track Reconstruction in the CMS L1 Track-Trigger System Based on Custom Associative Memories and High-Performance FPGAs |
title_short | A Real-Time Demonstrator for Track Reconstruction in the CMS L1 Track-Trigger System Based on Custom Associative Memories and High-Performance FPGAs |
title_sort | real-time demonstrator for track reconstruction in the cms l1 track-trigger system based on custom associative memories and high-performance fpgas |
topic | Detectors and Experimental Techniques |
url | https://dx.doi.org/10.22323/1.313.0138 http://cds.cern.ch/record/2673659 |
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