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A SystemVerilog-UVM Methodology for the Design, Simulation and Verification of Complex Readout Chips in High Energy Physics Applications
The adoption of a system-level simulation environment based on standard methodologies is a valuable solution to handle system complexity and achieve best design optimization. This work is focused on the implementation of such a platform for High Energy Physics (HEP) applications, i.e. for next gener...
| Autores principales: | , , , , , |
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| Lenguaje: | eng |
| Publicado: |
2017
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.1007/978-3-319-47913-2_5 http://cds.cern.ch/record/2318774 |
| _version_ | 1780958451348799488 |
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| author | Marconi, Sara Conti, Elia Placidi, Pisana Scorzoni, Andrea Christiansen, Jorgen Hemperek, Tomasz |
| author_facet | Marconi, Sara Conti, Elia Placidi, Pisana Scorzoni, Andrea Christiansen, Jorgen Hemperek, Tomasz |
| author_sort | Marconi, Sara |
| collection | CERN |
| description | The adoption of a system-level simulation environment based on standard methodologies is a valuable solution to handle system complexity and achieve best design optimization. This work is focused on the implementation of such a platform for High Energy Physics (HEP) applications, i.e. for next generation pixel detector readout chips in the framework of the RD53 collaboration. The generic and re-usable environment is capable of verifying different designs in an automated fashion under a wide and flexible stimuli space; it can also be used at different stages of the design process, from initial architecture optimization to final design verification. |
| id | oai-inspirehep.net-1673296 |
| institution | Organización Europea para la Investigación Nuclear |
| language | eng |
| publishDate | 2017 |
| record_format | invenio |
| spelling | oai-inspirehep.net-16732962019-09-30T06:29:59Zdoi:10.1007/978-3-319-47913-2_5http://cds.cern.ch/record/2318774engMarconi, SaraConti, EliaPlacidi, PisanaScorzoni, AndreaChristiansen, JorgenHemperek, TomaszA SystemVerilog-UVM Methodology for the Design, Simulation and Verification of Complex Readout Chips in High Energy Physics ApplicationsComputing and ComputersThe adoption of a system-level simulation environment based on standard methodologies is a valuable solution to handle system complexity and achieve best design optimization. This work is focused on the implementation of such a platform for High Energy Physics (HEP) applications, i.e. for next generation pixel detector readout chips in the framework of the RD53 collaboration. The generic and re-usable environment is capable of verifying different designs in an automated fashion under a wide and flexible stimuli space; it can also be used at different stages of the design process, from initial architecture optimization to final design verification.oai:inspirehep.net:16732962017 |
| spellingShingle | Computing and Computers Marconi, Sara Conti, Elia Placidi, Pisana Scorzoni, Andrea Christiansen, Jorgen Hemperek, Tomasz A SystemVerilog-UVM Methodology for the Design, Simulation and Verification of Complex Readout Chips in High Energy Physics Applications |
| title | A SystemVerilog-UVM Methodology for the Design, Simulation and Verification of Complex Readout Chips in High Energy Physics Applications |
| title_full | A SystemVerilog-UVM Methodology for the Design, Simulation and Verification of Complex Readout Chips in High Energy Physics Applications |
| title_fullStr | A SystemVerilog-UVM Methodology for the Design, Simulation and Verification of Complex Readout Chips in High Energy Physics Applications |
| title_full_unstemmed | A SystemVerilog-UVM Methodology for the Design, Simulation and Verification of Complex Readout Chips in High Energy Physics Applications |
| title_short | A SystemVerilog-UVM Methodology for the Design, Simulation and Verification of Complex Readout Chips in High Energy Physics Applications |
| title_sort | systemverilog-uvm methodology for the design, simulation and verification of complex readout chips in high energy physics applications |
| topic | Computing and Computers |
| url | https://dx.doi.org/10.1007/978-3-319-47913-2_5 http://cds.cern.ch/record/2318774 |
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