The NA62 first level trigger

The NA62 experiment is designed to measure the ultra-rare decay $K^+→\pi ^{+}v\bar{v}$ branching ratio. The Standard Model prediction requires an extremebeam intensity to make the measurement. Such an intense flux of particles needs ahigh-performance trigger and data acquisition system, ensuring a high acceptancefor the signal events together with a powerful rejection of the decays accountingfor most of the rate. The L0 Trigger Processor (L0TP) is the first layer of thetrigger chain. It is hardware implemented using programmable logic (FPGA). It isfully digital, based on standard Gigabit Ethernet communication between detectorsand L0TP Board. The L0TP Board is a commercial development board providedby Terasic. Data generated by different detectors are sent asynchronously usingthe UDP protocol to the L0TP during the entire beam spill period (∼5 seconds).The L0TP realigns in time the information coming from different sources lookingfor patterns characteristic of the event as energy, multiplicity, position of hits. Theselection of good events is provided by an associative memory based on preset masks.The input rate is higher than 10 MHz for each detector, reduced to a maximumoutput rate of 1 MHz. L0TP should guarantee a maximum latency of 1 ms. Thefinal version of the system has been used from 2016, and it is currently working forthe 2017 data taking. A review of the trigger performance will be presented.