Scaling Procedures and Post-Optimization for the Design of High-Efficiency Klystrons

A semianalytical parametric scaling procedure (PSP) for klystron design has been developed. The PSP allows existing klystron designs to be scaled to different operating frequencies, beam power, and perveance, while maintaining the electron bunching and deceleration processes. For the fixed layout of...

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Detalles Bibliográficos
Autores principales: Cai, Jinchi, Syratchev, Igor, Lui, Zening
Lenguaje:eng
Publicado: 2019
Materias:
Accelerators and Storage Rings
Acceso en línea:https://dx.doi.org/10.1109/TED.2018.2887348
http://cds.cern.ch/record/2655910
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author Cai, Jinchi
Syratchev, Igor
Lui, Zening
author_facet Cai, Jinchi
Syratchev, Igor
Lui, Zening
author_sort Cai, Jinchi
collection CERN
description A semianalytical parametric scaling procedure (PSP) for klystron design has been developed. The PSP allows existing klystron designs to be scaled to different operating frequencies, beam power, and perveance, while maintaining the electron bunching and deceleration processes. For the fixed layout of a klystron RF circuit, the PSP provides parameters of the scaled klystron which are nearly optimal. The theoretical background and step by step derivation of the scaling principles are presented. The effectiveness of the PSP is shown through a generic five-cavity L-band klystron.
id oai-inspirehep.net-1718421
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2019
record_format invenio
spelling oai-inspirehep.net-17184212022-08-10T12:26:27Zdoi:10.1109/TED.2018.2887348http://cds.cern.ch/record/2655910engCai, JinchiSyratchev, IgorLui, ZeningScaling Procedures and Post-Optimization for the Design of High-Efficiency KlystronsAccelerators and Storage RingsA semianalytical parametric scaling procedure (PSP) for klystron design has been developed. The PSP allows existing klystron designs to be scaled to different operating frequencies, beam power, and perveance, while maintaining the electron bunching and deceleration processes. For the fixed layout of a klystron RF circuit, the PSP provides parameters of the scaled klystron which are nearly optimal. The theoretical background and step by step derivation of the scaling principles are presented. The effectiveness of the PSP is shown through a generic five-cavity L-band klystron.oai:inspirehep.net:17184212019
spellingShingle Accelerators and Storage Rings
Cai, Jinchi
Syratchev, Igor
Lui, Zening
Scaling Procedures and Post-Optimization for the Design of High-Efficiency Klystrons
title Scaling Procedures and Post-Optimization for the Design of High-Efficiency Klystrons
title_full Scaling Procedures and Post-Optimization for the Design of High-Efficiency Klystrons
title_fullStr Scaling Procedures and Post-Optimization for the Design of High-Efficiency Klystrons
title_full_unstemmed Scaling Procedures and Post-Optimization for the Design of High-Efficiency Klystrons
title_short Scaling Procedures and Post-Optimization for the Design of High-Efficiency Klystrons
title_sort scaling procedures and post-optimization for the design of high-efficiency klystrons
topic Accelerators and Storage Rings
url https://dx.doi.org/10.1109/TED.2018.2887348
http://cds.cern.ch/record/2655910
work_keys_str_mv AT caijinchi scalingproceduresandpostoptimizationforthedesignofhighefficiencyklystrons
AT syratchevigor scalingproceduresandpostoptimizationforthedesignofhighefficiencyklystrons
AT luizening scalingproceduresandpostoptimizationforthedesignofhighefficiencyklystrons

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