Upgrade of the ATLAS Thin Gap Chamber Electronics for HL-LHC runs

The High-Luminosity LHC (HL-LHC) is planned to start the operation in 2026 with an instantaneous luminosity of $7.5 \times 10^{34}~\rm{cm^{-2}s^{-1}}$. In order to cope with higher proton-proton collision rate, the trigger and readout electronics of ATLAS Thin Gap Chamber (TGC) needs to be replaced. All hit data will be transferred from the frontend to the backend boards, and a fast-tracking algorithm will be applied on these hits for the first-level muon triggering. The first prototype of the frontend board has been developed with full functions required for HL-LHC runs including the data transfer of 256 channels with a $16~\rm{Gbps}$ bandwidth and the control of the discriminator threshold. They were demonstrated at the CERN SPS beam facility. The rate of single event upsets in Kintex-7 FPGA integrated on the prototype board was measured in the ATLAS detector area, and automatic error correction was demonstrated. The fast-tracking algorithm was performed using a Monte-Carlo sample and data taken by ATLAS. The result indicates that the advanced trigger based on fast-tracking reduces the trigger rate by 30% while increasing the efficiency by a few percent. These studies provide essential ingredients in the development of ATLAS TGC electronics for HL-LHC.