Research and development of the back-end electronics for the two-dimensional improved resistive plate chambers in CMS upgrade

To complement and ensure redundancy in the endcap muon system of the Compact Muon Solenoid (CMS) detector and to extend the Resistive Plate Chamber (RPC) system coverage, improved RPCs (iRPCs) with either orthogonal layer strips with one-end electronics or single layer strips with two-end electronics providing more precise time measurement will be installed in the very forward pseudorapidity region of $|\eta |<2.4$. The iRPC readout system needs to support two-dimensional (2D) or two-end readout. In addition, it must combine detector data with Timing, Trigger and fast Control (TTC) and Slow Control (SC) into one data stream over a bi-directional optical link with a line rate of 4.8 Gb/s between the Front-End Electronics (FEE) and the Back-End Electronics (BEE). To fulfill these requirements, a prototype BEE for the iRPC 2D chamber has been researched and designed.A Micro-Telecommunication and Computing Architecture ($\mu $TCA)-based processing card was designed in this study to establish a prototype system together with a $\mu $TCA crate. The Giga-Bit Transceiver (GBT) protocol is integrated to provide bi-directional communication between the FEE and BEE. A server is connected with the BEE by a Gigabit Ethernet (GbE) link for SC and a 10-GbE link for Data AcQuisition (DAQ).The Bit Error Rate (BER) test of the back-end board and a joint test with the iRPC 2D prototype chamber were performed. A BER of less than $1.331\times {10^{-16}}$ was obtained. The time measurement with a resolution of 3.05 ns was successfully realized, and detector efficiencies of 97.7% for longitudinal strips and 96.0% for orthogonal strips were measured. Test results demonstrate the correctness and reliability of the prototype BEE.The BEE prototype satisfies the requirements for the iRPC 2D chamber, and it worked stably and reliably during a long-term joint test run.