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Deep multilevel wet etching of fused silica glass microstructures in BOE solution

Fused silica glass is a material of choice for micromechanical, microfluidic, and optical devices due to its chemical resistance, optical, electrical, and mechanical performance. Wet etching is the key method for fabricating of such microdevices. Protective mask integrity is a big challenge due extr...

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Detalles Bibliográficos
Autores principales: Konstantinova, T. G., Andronic, M. M., Baklykov, D. A., Stukalova, V. E., Ezenkova, D. A., Zikiy, E. V., Bashinova, M. V., Solovev, A. A., Lotkov, E. S., Ryzhikov, I. A., Rodionov, I. A.
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Nature Publishing Group UK 2023
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10063648/
https://www.ncbi.nlm.nih.gov/pubmed/36997654
http://dx.doi.org/10.1038/s41598-023-32503-w
Descripción
Sumario:Fused silica glass is a material of choice for micromechanical, microfluidic, and optical devices due to its chemical resistance, optical, electrical, and mechanical performance. Wet etching is the key method for fabricating of such microdevices. Protective mask integrity is a big challenge due extremely aggressive properties of etching solution. Here, we propose multilevel microstructures fabrication route based on fused silica deep etching through a stepped mask. First, we provide an analysis of a fused silica dissolution mechanism in buffered oxide etching (BOE) solution and calculate the main fluoride fractions like [Formula: see text] , [Formula: see text] , [Formula: see text] as a function of pH and NH(4)F:HF ratio. Then, we experimentally investigate the influence of BOE composition (1:1–14:1) on the mask resistance, etch rate and profile isotropy during deep etching through a metal/photoresist mask. Finally, we demonstrate a high-quality multilevel over-200 μm etching process with the rate up to 3 μm/min, which could be of a great interest for advanced microdevices with flexure suspensions, inertial masses, microchannels, and through-wafer holes.