Direct Growth of Patterned Vertical Graphene Using Thermal Stress Mismatch between Barrier Layer and Substrate

Vertical graphene (VG) combines the excellent properties of conventional graphene with a unique vertical nanosheet structure, and has shown tremendous promise in the field of electronics and composites. However, its complex surface morphology brings great difficulties to micro-nano fabrication, especially regarding photolithography induced nanosheet collapse and remaining chemical residues. Here, we demonstrate an innovative method for directly growing patterned VG on a SiO(2)/Si substrate. A patterned Cr film was deposited on the substrate as a barrier layer. The VG was synthesized by PECVD on both the patterned Cr film and the exposed SiO(2)/Si substrate. During the cooling process, the patterned Cr film covered by VG naturally peeled off from the substrate due to the thermal stress mismatch, while the VG directly grown on the SiO(2)/Si substrate was remained. The temperature-dependent thermal stress distribution in each layer was analyzed using finite element simulations, and the separation mechanism of the Cr film from the substrate was explained. This method avoids the contamination and damage caused by the VG photolithography process. Our work is expected to provide a convenient and reliable solution for the manufacture of VG-based electronic devices.