Wafer-scale high-κ dielectrics for two-dimensional circuits via van der Waals integration

The practical application of two-dimensional (2D) semiconductors for high-performance electronics requires the integration with large-scale and high-quality dielectrics—which however have been challenging to deposit to date, owing to their dangling-bonds-free surface. Here, we report a dry dielectric integration strategy that enables the transfer of wafer-scale and high-κ dielectrics on top of 2D semiconductors. By utilizing an ultra-thin buffer layer, sub-3 nm thin Al(2)O(3) or HfO(2) dielectrics could be pre-deposited and then mechanically dry-transferred on top of MoS(2) monolayers. The transferred ultra-thin dielectric film could retain wafer-scale flatness and uniformity without any cracks, demonstrating a capacitance up to 2.8 μF/cm(2), equivalent oxide thickness down to 1.2 nm, and leakage currents of ~10(−7 )A/cm(2). The fabricated top-gate MoS(2) transistors showed intrinsic properties without doping effects, exhibiting on-off ratios of ~10(7), subthreshold swing down to 68 mV/dec, and lowest interface states of 7.6×10(9 )cm(−2) eV(−1). We also show that the scalable top-gate arrays can be used to construct functional logic gates. Our study provides a feasible route towards the vdW integration of high-κ dielectric films using an industry-compatible ALD process with well-controlled thickness, uniformity and scalability.