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Wafer-scale high-κ dielectrics for two-dimensional circuits via van der Waals integration

The practical application of two-dimensional (2D) semiconductors for high-performance electronics requires the integration with large-scale and high-quality dielectrics—which however have been challenging to deposit to date, owing to their dangling-bonds-free surface. Here, we report a dry dielectri...

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Autores principales: Lu, Zheyi, Chen, Yang, Dang, Weiqi, Kong, Lingan, Tao, Quanyang, Ma, Likuan, Lu, Donglin, Liu, Liting, Li, Wanying, Li, Zhiwei, Liu, Xiao, Wang, Yiliu, Duan, Xidong, Liao, Lei, Liu, Yuan
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Nature Publishing Group UK 2023
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10125989/
https://www.ncbi.nlm.nih.gov/pubmed/37095079
http://dx.doi.org/10.1038/s41467-023-37887-x
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author Lu, Zheyi
Chen, Yang
Dang, Weiqi
Kong, Lingan
Tao, Quanyang
Ma, Likuan
Lu, Donglin
Liu, Liting
Li, Wanying
Li, Zhiwei
Liu, Xiao
Wang, Yiliu
Duan, Xidong
Liao, Lei
Liu, Yuan
author_facet Lu, Zheyi
Chen, Yang
Dang, Weiqi
Kong, Lingan
Tao, Quanyang
Ma, Likuan
Lu, Donglin
Liu, Liting
Li, Wanying
Li, Zhiwei
Liu, Xiao
Wang, Yiliu
Duan, Xidong
Liao, Lei
Liu, Yuan
author_sort Lu, Zheyi
collection PubMed
description The practical application of two-dimensional (2D) semiconductors for high-performance electronics requires the integration with large-scale and high-quality dielectrics—which however have been challenging to deposit to date, owing to their dangling-bonds-free surface. Here, we report a dry dielectric integration strategy that enables the transfer of wafer-scale and high-κ dielectrics on top of 2D semiconductors. By utilizing an ultra-thin buffer layer, sub-3 nm thin Al(2)O(3) or HfO(2) dielectrics could be pre-deposited and then mechanically dry-transferred on top of MoS(2) monolayers. The transferred ultra-thin dielectric film could retain wafer-scale flatness and uniformity without any cracks, demonstrating a capacitance up to 2.8 μF/cm(2), equivalent oxide thickness down to 1.2 nm, and leakage currents of ~10(−7 )A/cm(2). The fabricated top-gate MoS(2) transistors showed intrinsic properties without doping effects, exhibiting on-off ratios of ~10(7), subthreshold swing down to 68 mV/dec, and lowest interface states of 7.6×10(9 )cm(−2) eV(−1). We also show that the scalable top-gate arrays can be used to construct functional logic gates. Our study provides a feasible route towards the vdW integration of high-κ dielectric films using an industry-compatible ALD process with well-controlled thickness, uniformity and scalability.
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spelling pubmed-101259892023-04-26 Wafer-scale high-κ dielectrics for two-dimensional circuits via van der Waals integration Lu, Zheyi Chen, Yang Dang, Weiqi Kong, Lingan Tao, Quanyang Ma, Likuan Lu, Donglin Liu, Liting Li, Wanying Li, Zhiwei Liu, Xiao Wang, Yiliu Duan, Xidong Liao, Lei Liu, Yuan Nat Commun Article The practical application of two-dimensional (2D) semiconductors for high-performance electronics requires the integration with large-scale and high-quality dielectrics—which however have been challenging to deposit to date, owing to their dangling-bonds-free surface. Here, we report a dry dielectric integration strategy that enables the transfer of wafer-scale and high-κ dielectrics on top of 2D semiconductors. By utilizing an ultra-thin buffer layer, sub-3 nm thin Al(2)O(3) or HfO(2) dielectrics could be pre-deposited and then mechanically dry-transferred on top of MoS(2) monolayers. The transferred ultra-thin dielectric film could retain wafer-scale flatness and uniformity without any cracks, demonstrating a capacitance up to 2.8 μF/cm(2), equivalent oxide thickness down to 1.2 nm, and leakage currents of ~10(−7 )A/cm(2). The fabricated top-gate MoS(2) transistors showed intrinsic properties without doping effects, exhibiting on-off ratios of ~10(7), subthreshold swing down to 68 mV/dec, and lowest interface states of 7.6×10(9 )cm(−2) eV(−1). We also show that the scalable top-gate arrays can be used to construct functional logic gates. Our study provides a feasible route towards the vdW integration of high-κ dielectric films using an industry-compatible ALD process with well-controlled thickness, uniformity and scalability. Nature Publishing Group UK 2023-04-24 /pmc/articles/PMC10125989/ /pubmed/37095079 http://dx.doi.org/10.1038/s41467-023-37887-x Text en © The Author(s) 2023 https://creativecommons.org/licenses/by/4.0/Open Access This article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license, and indicate if changes were made. The images or other third party material in this article are included in the article’s Creative Commons license, unless indicated otherwise in a credit line to the material. If material is not included in the article’s Creative Commons license and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/ (https://creativecommons.org/licenses/by/4.0/) .
spellingShingle Article
Lu, Zheyi
Chen, Yang
Dang, Weiqi
Kong, Lingan
Tao, Quanyang
Ma, Likuan
Lu, Donglin
Liu, Liting
Li, Wanying
Li, Zhiwei
Liu, Xiao
Wang, Yiliu
Duan, Xidong
Liao, Lei
Liu, Yuan
Wafer-scale high-κ dielectrics for two-dimensional circuits via van der Waals integration
title Wafer-scale high-κ dielectrics for two-dimensional circuits via van der Waals integration
title_full Wafer-scale high-κ dielectrics for two-dimensional circuits via van der Waals integration
title_fullStr Wafer-scale high-κ dielectrics for two-dimensional circuits via van der Waals integration
title_full_unstemmed Wafer-scale high-κ dielectrics for two-dimensional circuits via van der Waals integration
title_short Wafer-scale high-κ dielectrics for two-dimensional circuits via van der Waals integration
title_sort wafer-scale high-κ dielectrics for two-dimensional circuits via van der waals integration
topic Article
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10125989/
https://www.ncbi.nlm.nih.gov/pubmed/37095079
http://dx.doi.org/10.1038/s41467-023-37887-x
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