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RescueSNN: enabling reliable executions on spiking neural network accelerators under permanent faults
To maximize the performance and energy efficiency of Spiking Neural Network (SNN) processing on resource-constrained embedded systems, specialized hardware accelerators/chips are employed. However, these SNN chips may suffer from permanent faults which can affect the functionality of weight memory a...
Autores principales: | , , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
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Frontiers Media S.A.
2023
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10130579/ https://www.ncbi.nlm.nih.gov/pubmed/37123371 http://dx.doi.org/10.3389/fnins.2023.1159440 |
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author | Putra, Rachmad Vidya Wicaksana Hanif, Muhammad Abdullah Shafique, Muhammad |
author_facet | Putra, Rachmad Vidya Wicaksana Hanif, Muhammad Abdullah Shafique, Muhammad |
author_sort | Putra, Rachmad Vidya Wicaksana |
collection | PubMed |
description | To maximize the performance and energy efficiency of Spiking Neural Network (SNN) processing on resource-constrained embedded systems, specialized hardware accelerators/chips are employed. However, these SNN chips may suffer from permanent faults which can affect the functionality of weight memory and neuron behavior, thereby causing potentially significant accuracy degradation and system malfunctioning. Such permanent faults may come from manufacturing defects during the fabrication process, and/or from device/transistor damages (e.g., due to wear out) during the run-time operation. However, the impact of permanent faults in SNN chips and the respective mitigation techniques have not been thoroughly investigated yet. Toward this, we propose RescueSNN, a novel methodology to mitigate permanent faults in the compute engine of SNN chips without requiring additional retraining, thereby significantly cutting down the design time and retraining costs, while maintaining the throughput and quality. The key ideas of our RescueSNN methodology are (1) analyzing the characteristics of SNN under permanent faults; (2) leveraging this analysis to improve the SNN fault-tolerance through effective fault-aware mapping (FAM); and (3) devising lightweight hardware enhancements to support FAM. Our FAM technique leverages the fault map of SNN compute engine for (i) minimizing weight corruption when mapping weight bits on the faulty memory cells, and (ii) selectively employing faulty neurons that do not cause significant accuracy degradation to maintain accuracy and throughput, while considering the SNN operations and processing dataflow. The experimental results show that our RescueSNN improves accuracy by up to 80% while maintaining the throughput reduction below 25% in high fault rate (e.g., 0.5 of the potential fault locations), as compared to running SNNs on the faulty chip without mitigation. In this manner, the embedded systems that employ RescueSNN-enhanced chips can efficiently ensure reliable executions against permanent faults during their operational lifetime. |
format | Online Article Text |
id | pubmed-10130579 |
institution | National Center for Biotechnology Information |
language | English |
publishDate | 2023 |
publisher | Frontiers Media S.A. |
record_format | MEDLINE/PubMed |
spelling | pubmed-101305792023-04-27 RescueSNN: enabling reliable executions on spiking neural network accelerators under permanent faults Putra, Rachmad Vidya Wicaksana Hanif, Muhammad Abdullah Shafique, Muhammad Front Neurosci Neuroscience To maximize the performance and energy efficiency of Spiking Neural Network (SNN) processing on resource-constrained embedded systems, specialized hardware accelerators/chips are employed. However, these SNN chips may suffer from permanent faults which can affect the functionality of weight memory and neuron behavior, thereby causing potentially significant accuracy degradation and system malfunctioning. Such permanent faults may come from manufacturing defects during the fabrication process, and/or from device/transistor damages (e.g., due to wear out) during the run-time operation. However, the impact of permanent faults in SNN chips and the respective mitigation techniques have not been thoroughly investigated yet. Toward this, we propose RescueSNN, a novel methodology to mitigate permanent faults in the compute engine of SNN chips without requiring additional retraining, thereby significantly cutting down the design time and retraining costs, while maintaining the throughput and quality. The key ideas of our RescueSNN methodology are (1) analyzing the characteristics of SNN under permanent faults; (2) leveraging this analysis to improve the SNN fault-tolerance through effective fault-aware mapping (FAM); and (3) devising lightweight hardware enhancements to support FAM. Our FAM technique leverages the fault map of SNN compute engine for (i) minimizing weight corruption when mapping weight bits on the faulty memory cells, and (ii) selectively employing faulty neurons that do not cause significant accuracy degradation to maintain accuracy and throughput, while considering the SNN operations and processing dataflow. The experimental results show that our RescueSNN improves accuracy by up to 80% while maintaining the throughput reduction below 25% in high fault rate (e.g., 0.5 of the potential fault locations), as compared to running SNNs on the faulty chip without mitigation. In this manner, the embedded systems that employ RescueSNN-enhanced chips can efficiently ensure reliable executions against permanent faults during their operational lifetime. Frontiers Media S.A. 2023-04-12 /pmc/articles/PMC10130579/ /pubmed/37123371 http://dx.doi.org/10.3389/fnins.2023.1159440 Text en Copyright © 2023 Putra, Hanif and Shafique. https://creativecommons.org/licenses/by/4.0/This is an open-access article distributed under the terms of the Creative Commons Attribution License (CC BY). The use, distribution or reproduction in other forums is permitted, provided the original author(s) and the copyright owner(s) are credited and that the original publication in this journal is cited, in accordance with accepted academic practice. No use, distribution or reproduction is permitted which does not comply with these terms. |
spellingShingle | Neuroscience Putra, Rachmad Vidya Wicaksana Hanif, Muhammad Abdullah Shafique, Muhammad RescueSNN: enabling reliable executions on spiking neural network accelerators under permanent faults |
title | RescueSNN: enabling reliable executions on spiking neural network accelerators under permanent faults |
title_full | RescueSNN: enabling reliable executions on spiking neural network accelerators under permanent faults |
title_fullStr | RescueSNN: enabling reliable executions on spiking neural network accelerators under permanent faults |
title_full_unstemmed | RescueSNN: enabling reliable executions on spiking neural network accelerators under permanent faults |
title_short | RescueSNN: enabling reliable executions on spiking neural network accelerators under permanent faults |
title_sort | rescuesnn: enabling reliable executions on spiking neural network accelerators under permanent faults |
topic | Neuroscience |
url | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10130579/ https://www.ncbi.nlm.nih.gov/pubmed/37123371 http://dx.doi.org/10.3389/fnins.2023.1159440 |
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