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Gate-Level Circuit Partitioning Algorithm Based on Clustering and an Improved Genetic Algorithm
Gate-level circuit partitioning is an important development trend for improving the efficiency of simulation in EDA software. In this paper, a gate-level circuit partitioning algorithm, based on clustering and an improved genetic algorithm, is proposed for the gate-level simulation task. First, a cl...
Autores principales: | Cheng, Rui, Yin, Lin-Zi, Jiang, Zhao-Hui, Xu, Xue-Mei |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
MDPI
2023
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10138116/ https://www.ncbi.nlm.nih.gov/pubmed/37190385 http://dx.doi.org/10.3390/e25040597 |
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