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Stacked SiGe nanosheets p-FET for Sub-3 nm logic applications
The fabrication of vertically stacked SiGe nanosheet (NS) field-effect transistors (FETs) was demonstrated in this study. The key process technologies involved in this device fabrication are low pressure chemical vapor deposition SiGe/Si multilayer epitaxy, selective etching of Si layers over SiGe l...
Autores principales: | Chu, Chun-Lin, Hsu, Shu-Han, Chang, Wei-Yuan, Luo, Guang-Li, Chen, Szu-Hung |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
Nature Publishing Group UK
2023
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10256751/ https://www.ncbi.nlm.nih.gov/pubmed/37296220 http://dx.doi.org/10.1038/s41598-023-36614-2 |
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