Device‐Algorithm Co‐Optimization for an On‐Chip Trainable Capacitor‐Based Synaptic Device with IGZO TFT and Retention‐Centric Tiki‐Taka Algorithm

Analog in‐memory computing synaptic devices are widely studied for efficient implementation of deep learning. However, synaptic devices based on resistive memory have difficulties implementing on‐chip training due to the lack of means to control the amount of resistance change and large device varia...

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Detalles Bibliográficos
Autores principales: Won, Jongun, Kang, Jaehyeon, Hong, Sangjun, Han, Narae, Kang, Minseung, Park, Yeaji, Roh, Youngchae, Seo, Hyeong Jun, Joe, Changhoon, Cho, Ung, Kang, Minil, Um, Minseong, Lee, Kwang‐Hee, Yang, Jee‐Eun, Jung, Moonil, Lee, Hyung‐Min, Oh, Saeroonter, Kim, Sangwook, Kim, Sangbum
Formato: Online Artículo Texto
Lenguaje:English
Publicado: John Wiley and Sons Inc. 2023
Materias:
Research Articles
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10582414/
https://www.ncbi.nlm.nih.gov/pubmed/37559176
http://dx.doi.org/10.1002/advs.202303018

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