Dynamically Scalable NoC Architecture for Implementing Run-Time Reconfigurable Applications

The paper proposes two architectures for a dynamically scalable network-on-chip (NoC) for dynamically reconfigurable intellectual properties (IPs) to save power. The first architecture is a run-time scalable column-based NoC, where the columns of the NoC are scaled up and down at run-time depending...

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Detalles Bibliográficos
Autores principales: Ijaz, Qaiser, Kidane, Hiliwi Leake, Bourennane, El-Bay, Ochoa-Ruiz, Gilberto
Formato: Online Artículo Texto
Lenguaje:English
Publicado: MDPI 2023
Materias:
Article
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10609355/
https://www.ncbi.nlm.nih.gov/pubmed/37893350
http://dx.doi.org/10.3390/mi14101913

Internet

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10609355/
https://www.ncbi.nlm.nih.gov/pubmed/37893350
http://dx.doi.org/10.3390/mi14101913

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