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Monolithic three-dimensional integration of RRAM-based hybrid memory architecture for one-shot learning

In this work, we report the monolithic three-dimensional integration (M3D) of hybrid memory architecture based on resistive random-access memory (RRAM), named M3D-LIME. The chip featured three key functional layers: the first was Si complementary metal-oxide-semiconductor (CMOS) for control logic; t...

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Detalles Bibliográficos
Autores principales: Li, Yijun, Tang, Jianshi, Gao, Bin, Yao, Jian, Fan, Anjunyi, Yan, Bonan, Yang, Yuchao, Xi, Yue, Li, Yuankun, Li, Jiaming, Sun, Wen, Du, Yiwei, Liu, Zhengwu, Zhang, Qingtian, Qiu, Song, Li, Qingwen, Qian, He, Wu, Huaqiang
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Nature Publishing Group UK 2023
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10628152/
https://www.ncbi.nlm.nih.gov/pubmed/37932300
http://dx.doi.org/10.1038/s41467-023-42981-1
Descripción
Sumario:In this work, we report the monolithic three-dimensional integration (M3D) of hybrid memory architecture based on resistive random-access memory (RRAM), named M3D-LIME. The chip featured three key functional layers: the first was Si complementary metal-oxide-semiconductor (CMOS) for control logic; the second was computing-in-memory (CIM) layer with HfAlO(x)-based analog RRAM array to implement neural networks for feature extractions; the third was on-chip buffer and ternary content-addressable memory (TCAM) array for template storing and matching, based on Ta(2)O(5)-based binary RRAM and carbon nanotube field-effect transistor (CNTFET). Extensive structural analysis along with array-level electrical measurements and functional demonstrations on the CIM and TCAM arrays was performed. The M3D-LIME chip was further used to implement one-shot learning, where ~96% accuracy was achieved on the Omniglot dataset while exhibiting 18.3× higher energy efficiency than graphics processing unit (GPU). This work demonstrates the tremendous potential of M3D-LIME with RRAM-based hybrid memory architecture for future data-centric applications.