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Two novel low-power and high-speed dynamic carbon nanotube full-adder cells

In this paper, two novel low-power and high-speed carbon nanotube full-adder cells in dynamic logic style are presented. Carbon nanotube field-effect transistors (CNFETs) are efficient in designing a high performance circuit. To design our full-adder cells, CNFETs with three different threshold volt...

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Detalles Bibliográficos
Autores principales: Bagherizadeh, Mehdi, Eshghi, Mohammad
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Springer 2011
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3212058/
https://www.ncbi.nlm.nih.gov/pubmed/21888634
http://dx.doi.org/10.1186/1556-276X-6-519
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author Bagherizadeh, Mehdi
Eshghi, Mohammad
author_facet Bagherizadeh, Mehdi
Eshghi, Mohammad
author_sort Bagherizadeh, Mehdi
collection PubMed
description In this paper, two novel low-power and high-speed carbon nanotube full-adder cells in dynamic logic style are presented. Carbon nanotube field-effect transistors (CNFETs) are efficient in designing a high performance circuit. To design our full-adder cells, CNFETs with three different threshold voltages (low threshold, normal threshold, and high threshold) are used. First design generates SUM and COUT through separate transistors, and second design is a multi-output dynamic full adder. Proposed full adders are simulated using HSPICE based on CNFET model with 0.9 V supply voltages. Simulation result shows that the proposed designs consume less power and have low power-delay product compared to other CNFET-based full-adder cells.
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spelling pubmed-32120582011-11-09 Two novel low-power and high-speed dynamic carbon nanotube full-adder cells Bagherizadeh, Mehdi Eshghi, Mohammad Nanoscale Res Lett Nano Express In this paper, two novel low-power and high-speed carbon nanotube full-adder cells in dynamic logic style are presented. Carbon nanotube field-effect transistors (CNFETs) are efficient in designing a high performance circuit. To design our full-adder cells, CNFETs with three different threshold voltages (low threshold, normal threshold, and high threshold) are used. First design generates SUM and COUT through separate transistors, and second design is a multi-output dynamic full adder. Proposed full adders are simulated using HSPICE based on CNFET model with 0.9 V supply voltages. Simulation result shows that the proposed designs consume less power and have low power-delay product compared to other CNFET-based full-adder cells. Springer 2011-09-02 /pmc/articles/PMC3212058/ /pubmed/21888634 http://dx.doi.org/10.1186/1556-276X-6-519 Text en Copyright ©2011 Bagherizadeh and Eshghi; licensee Springer. http://creativecommons.org/licenses/by/2.0 This is an Open Access article distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/2.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
spellingShingle Nano Express
Bagherizadeh, Mehdi
Eshghi, Mohammad
Two novel low-power and high-speed dynamic carbon nanotube full-adder cells
title Two novel low-power and high-speed dynamic carbon nanotube full-adder cells
title_full Two novel low-power and high-speed dynamic carbon nanotube full-adder cells
title_fullStr Two novel low-power and high-speed dynamic carbon nanotube full-adder cells
title_full_unstemmed Two novel low-power and high-speed dynamic carbon nanotube full-adder cells
title_short Two novel low-power and high-speed dynamic carbon nanotube full-adder cells
title_sort two novel low-power and high-speed dynamic carbon nanotube full-adder cells
topic Nano Express
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3212058/
https://www.ncbi.nlm.nih.gov/pubmed/21888634
http://dx.doi.org/10.1186/1556-276X-6-519
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