A Voltage Mode Memristor Bridge Synaptic Circuit with Memristor Emulators

A memristor bridge neural circuit which is able to perform signed synaptic weighting was proposed in our previous study, where the synaptic operation was verified via software simulation of the mathematical model of the HP memristor. This study is an extension of the previous work advancing toward t...

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Autores principales: Sah, Maheshwar Pd., Yang, Changju, Kim, Hyongsuk, Chua, Leon
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Molecular Diversity Preservation International (MDPI) 2012
Materias:
Article
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3376599/
https://www.ncbi.nlm.nih.gov/pubmed/22737026
http://dx.doi.org/10.3390/s120303587
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author Sah, Maheshwar Pd.
Yang, Changju
Kim, Hyongsuk
Chua, Leon
author_facet Sah, Maheshwar Pd.
Yang, Changju
Kim, Hyongsuk
Chua, Leon
author_sort Sah, Maheshwar Pd.
collection PubMed
description A memristor bridge neural circuit which is able to perform signed synaptic weighting was proposed in our previous study, where the synaptic operation was verified via software simulation of the mathematical model of the HP memristor. This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits. In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits. The feasibility of the memristor bridge neural circuit is verified via SPICE simulations.
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spelling pubmed-33765992012-06-25 A Voltage Mode Memristor Bridge Synaptic Circuit with Memristor Emulators Sah, Maheshwar Pd. Yang, Changju Kim, Hyongsuk Chua, Leon Sensors (Basel) Article A memristor bridge neural circuit which is able to perform signed synaptic weighting was proposed in our previous study, where the synaptic operation was verified via software simulation of the mathematical model of the HP memristor. This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits. In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits. The feasibility of the memristor bridge neural circuit is verified via SPICE simulations. Molecular Diversity Preservation International (MDPI) 2012-03-14 /pmc/articles/PMC3376599/ /pubmed/22737026 http://dx.doi.org/10.3390/s120303587 Text en © 2012 by the authors; licensee MDPI, Basel, Switzerland This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution license (http://creativecommons.org/licenses/by/3.0/).
spellingShingle Article
Sah, Maheshwar Pd.
Yang, Changju
Kim, Hyongsuk
Chua, Leon
A Voltage Mode Memristor Bridge Synaptic Circuit with Memristor Emulators
title A Voltage Mode Memristor Bridge Synaptic Circuit with Memristor Emulators
title_full A Voltage Mode Memristor Bridge Synaptic Circuit with Memristor Emulators
title_fullStr A Voltage Mode Memristor Bridge Synaptic Circuit with Memristor Emulators
title_full_unstemmed A Voltage Mode Memristor Bridge Synaptic Circuit with Memristor Emulators
title_short A Voltage Mode Memristor Bridge Synaptic Circuit with Memristor Emulators
title_sort voltage mode memristor bridge synaptic circuit with memristor emulators
topic Article
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3376599/
https://www.ncbi.nlm.nih.gov/pubmed/22737026
http://dx.doi.org/10.3390/s120303587
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