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Efficient k-Winner-Take-All Competitive Learning Hardware Architecture for On-Chip Learning
A novel k-winners-take-all (k-WTA) competitive learning (CL) hardware architecture is presented for on-chip learning in this paper. The architecture is based on an efficient pipeline allowing k-WTA competition processes associated with different training vectors to be performed concurrently. The pip...
Autores principales: | Ou, Chien-Min, Li, Hui-Ya, Hwang, Wen-Jyi |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
Molecular Diversity Preservation International (MDPI)
2012
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3478803/ http://dx.doi.org/10.3390/s120911661 |
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