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Pinch-off mechanism in double-lateral-gate junctionless transistors fabricated by scanning probe microscope based lithography
A double-lateral-gate p-type junctionless transistor is fabricated on a low-doped (10(15)) silicon-on-insulator wafer by a lithography technique based on scanning probe microscopy and two steps of wet chemical etching. The experimental transfer characteristics are obtained and compared with the nume...
| Autores principales: | , , , , , , , |
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| Formato: | Online Artículo Texto |
| Lenguaje: | English |
| Publicado: |
Beilstein-Institut
2012
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| Materias: | |
| Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3554704/ https://www.ncbi.nlm.nih.gov/pubmed/23365794 http://dx.doi.org/10.3762/bjnano.3.91 |