Cargando…

Energy dissipation and error probability in fault-tolerant binary switching

The potential energy profile of an ideal binary switch is a symmetric double well. Switching between the wells without energy dissipation requires time-modulating the height of the potential barrier separating the wells and tilting the profile towards the desired well at the precise juncture when th...

Descripción completa

Detalles Bibliográficos
Autores principales: Fashami, Mohammad Salehi, Atulasimha, Jayasimha, Bandyopadhyay, Supriyo
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Nature Publishing Group 2013
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC3826093/
https://www.ncbi.nlm.nih.gov/pubmed/24220310
http://dx.doi.org/10.1038/srep03204
Descripción
Sumario:The potential energy profile of an ideal binary switch is a symmetric double well. Switching between the wells without energy dissipation requires time-modulating the height of the potential barrier separating the wells and tilting the profile towards the desired well at the precise juncture when the barrier disappears. This, however, demands perfect timing synchronization and is therefore fault-intolerant even in the absence of noise. A fault-tolerant strategy that requires no time modulation of the barrier (and hence no timing synchronization) switches by tilting the profile by an amount at least equal to the barrier height and dissipates at least that amount of energy in abrupt switching. Here, we present a third strategy that requires a time modulated barrier but no timing synchronization. It is therefore fault-tolerant, error-free in the absence of thermal noise, and yet it dissipates arbitrarily small energy in a noise-free environment since an arbitrarily small tilt is required for slow switching. This case is exemplified with stress induced switching of a shape-anisotropic single-domain soft nanomagnet dipole-coupled to a hard magnet. When thermal noise is present, we show analytically that the minimum energy dissipated to switch in this scheme is ~2kTln(1/p) [p = switching error probability].