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Modeling and Simulation of Network-on-Chip Systems with DEVS and DEUS
Networks on-chip (NoCs) provide enhanced performance, scalability, modularity, and design productivity as compared with previous communication architectures for VLSI systems on-chip (SoCs), such as buses and dedicated signal wires. Since the NoC design space is very large and high dimensional, evalu...
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| Formato: | Online Artículo Texto |
| Lenguaje: | English |
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Hindawi Publishing Corporation
2014
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| Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4032749/ https://www.ncbi.nlm.nih.gov/pubmed/24895686 http://dx.doi.org/10.1155/2014/982569 |