Fabrication of high performance thin-film transistors via pressure-induced nucleation

We report a method to improve the performance of polycrystalline Si (poly-Si) thin-film transistors (TFTs) via pressure-induced nucleation (PIN). During the PIN process, spatial variation in the local solidification temperature occurs because of a non-uniform pressure distribution during laser irradiation of the amorphous Si layer, which is capped with an SiO(2) layer. This leads to a four-fold increase in the grain size of the poly-Si thin-films formed using the PIN process, compared with those formed using conventional excimer laser annealing. We find that thin films with optimal electrical properties can be achieved with a reduction in the number of laser irradiations from 20 to 6, as well as the preservation of the interface between the poly-Si and the SiO(2) gate insulator. This interface preservation becomes possible to remove the cleaning process prior to gate insulator deposition, and we report devices with a field-effect mobility greater than 160 cm(2)/Vs.