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Small-area and compact CMOS emulator circuit for CMOS/nanoscale memristor co-design
In this paper, a CMOS emulator circuit that can reproduce nanoscale memristive behavior is proposed. The proposed emulator circuit can mimic the pinched hysteresis loops of nanoscale memristor memory's current-voltage relationship without using any resistor array, complicated circuit blocks, et...
Autores principales: | Shin, SangHak, Choi, Jun-Myung, Cho, Seongik, Min, Kyeong-Sik |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
Springer
2013
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4228413/ https://www.ncbi.nlm.nih.gov/pubmed/24180626 http://dx.doi.org/10.1186/1556-276X-8-454 |
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