Cargando…
Rigorously modeling self-stabilizing fault-tolerant circuits: An ultra-robust clocking scheme for systems-on-chip()
We present the first implementation of a distributed clock generation scheme for Systems-on-Chip that recovers from an unbounded number of arbitrary transient faults despite a large number of arbitrary permanent faults. We devise self-stabilizing hardware building blocks and a hybrid synchronous/asy...
Autores principales: | Dolev, Danny, Függer, Matthias, Posch, Markus, Schmid, Ulrich, Steininger, Andreas, Lenzen, Christoph |
---|---|
Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
Elsevier B.V
2014
|
Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4579925/ https://www.ncbi.nlm.nih.gov/pubmed/26516290 http://dx.doi.org/10.1016/j.jcss.2014.01.001 |
Ejemplares similares
-
Fault-tolerant scheme for robotic manipulator—Nonlinear robust back-stepping control with friction compensation
por: Ali, Khurram, et al.
Publicado: (2021) -
Advanced neural network-based computational schemes for robust fault diagnosis
por: Mrugalski, Marcin
Publicado: (2014) -
Robustness to Faults Promotes Evolvability: Insights from Evolving Digital Circuits
por: Milano, Nicola, et al.
Publicado: (2016) -
Demonstration of qubit operations below a rigorous fault tolerance threshold with gate set tomography
por: Blume-Kohout, Robin, et al.
Publicado: (2017) -
Publisher Correction: Demonstration of qubit operations below a rigorous fault tolerance threshold with gate set tomography
por: Blume-Kohout, Robin, et al.
Publicado: (2018)