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Sub-kT/q Subthreshold-Slope Using Negative Capacitance in Low-Temperature Polycrystalline-Silicon Thin-Film Transistor

Realizing a low-temperature polycrystalline-silicon (LTPS) thin-film transistor (TFT) with sub-kT/q subthreshold slope (SS) is significantly important to the development of next generation active-matrix organic-light emitting diode displays. This is the first time a sub-kT/q SS (31.44 mV/dec) incorp...

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Autores principales: Park, Jae Hyo, Jang, Gil Su, Kim, Hyung Yoon, Seok, Ki Hwan, Chae, Hee Jae, Lee, Sol Kyu, Joo, Seung Ki
Formato: Online Artículo Texto
Lenguaje:English
Publicado: Nature Publishing Group 2016
Materias:
Acceso en línea:https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4838852/
https://www.ncbi.nlm.nih.gov/pubmed/27098115
http://dx.doi.org/10.1038/srep24734
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author Park, Jae Hyo
Jang, Gil Su
Kim, Hyung Yoon
Seok, Ki Hwan
Chae, Hee Jae
Lee, Sol Kyu
Joo, Seung Ki
author_facet Park, Jae Hyo
Jang, Gil Su
Kim, Hyung Yoon
Seok, Ki Hwan
Chae, Hee Jae
Lee, Sol Kyu
Joo, Seung Ki
author_sort Park, Jae Hyo
collection PubMed
description Realizing a low-temperature polycrystalline-silicon (LTPS) thin-film transistor (TFT) with sub-kT/q subthreshold slope (SS) is significantly important to the development of next generation active-matrix organic-light emitting diode displays. This is the first time a sub-kT/q SS (31.44 mV/dec) incorporated with a LTPS-TFT with polycrystalline-Pb(Zr,Ti)O(3) (PZT)/ZrTiO(4) (ZTO) gate dielectrics has been demonstrated. The sub-kT/q SS was observed in the weak inversion region at −0.5 V showing ultra-low operating voltage with the highest mobility (250.5 cm(2)/Vsec) reported so far. In addition, the reliability of DC negative bias stress, hot carrier stress and self-heating stress in LTPS-TFT with negative capacitance was investigated for the first time. It was found that the self-heating stress showed accelerated SS degradation due to the PZT Curie temperature.
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spelling pubmed-48388522016-04-27 Sub-kT/q Subthreshold-Slope Using Negative Capacitance in Low-Temperature Polycrystalline-Silicon Thin-Film Transistor Park, Jae Hyo Jang, Gil Su Kim, Hyung Yoon Seok, Ki Hwan Chae, Hee Jae Lee, Sol Kyu Joo, Seung Ki Sci Rep Article Realizing a low-temperature polycrystalline-silicon (LTPS) thin-film transistor (TFT) with sub-kT/q subthreshold slope (SS) is significantly important to the development of next generation active-matrix organic-light emitting diode displays. This is the first time a sub-kT/q SS (31.44 mV/dec) incorporated with a LTPS-TFT with polycrystalline-Pb(Zr,Ti)O(3) (PZT)/ZrTiO(4) (ZTO) gate dielectrics has been demonstrated. The sub-kT/q SS was observed in the weak inversion region at −0.5 V showing ultra-low operating voltage with the highest mobility (250.5 cm(2)/Vsec) reported so far. In addition, the reliability of DC negative bias stress, hot carrier stress and self-heating stress in LTPS-TFT with negative capacitance was investigated for the first time. It was found that the self-heating stress showed accelerated SS degradation due to the PZT Curie temperature. Nature Publishing Group 2016-04-21 /pmc/articles/PMC4838852/ /pubmed/27098115 http://dx.doi.org/10.1038/srep24734 Text en Copyright © 2016, Macmillan Publishers Limited http://creativecommons.org/licenses/by/4.0/ This work is licensed under a Creative Commons Attribution 4.0 International License. The images or other third party material in this article are included in the article’s Creative Commons license, unless indicated otherwise in the credit line; if the material is not included under the Creative Commons license, users will need to obtain permission from the license holder to reproduce the material. To view a copy of this license, visit http://creativecommons.org/licenses/by/4.0/
spellingShingle Article
Park, Jae Hyo
Jang, Gil Su
Kim, Hyung Yoon
Seok, Ki Hwan
Chae, Hee Jae
Lee, Sol Kyu
Joo, Seung Ki
Sub-kT/q Subthreshold-Slope Using Negative Capacitance in Low-Temperature Polycrystalline-Silicon Thin-Film Transistor
title Sub-kT/q Subthreshold-Slope Using Negative Capacitance in Low-Temperature Polycrystalline-Silicon Thin-Film Transistor
title_full Sub-kT/q Subthreshold-Slope Using Negative Capacitance in Low-Temperature Polycrystalline-Silicon Thin-Film Transistor
title_fullStr Sub-kT/q Subthreshold-Slope Using Negative Capacitance in Low-Temperature Polycrystalline-Silicon Thin-Film Transistor
title_full_unstemmed Sub-kT/q Subthreshold-Slope Using Negative Capacitance in Low-Temperature Polycrystalline-Silicon Thin-Film Transistor
title_short Sub-kT/q Subthreshold-Slope Using Negative Capacitance in Low-Temperature Polycrystalline-Silicon Thin-Film Transistor
title_sort sub-kt/q subthreshold-slope using negative capacitance in low-temperature polycrystalline-silicon thin-film transistor
topic Article
url https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4838852/
https://www.ncbi.nlm.nih.gov/pubmed/27098115
http://dx.doi.org/10.1038/srep24734
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