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Simple Cortical and Thalamic Neuron Models for Digital Arithmetic Circuit Implementation
Trade-off between reproducibility of neuronal activities and computational efficiency is one of crucial subjects in computational neuroscience and neuromorphic engineering. A wide variety of neuronal models have been studied from different viewpoints. The digital spiking silicon neuron (DSSN) model...
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
Frontiers Media S.A.
2016
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4865656/ https://www.ncbi.nlm.nih.gov/pubmed/27242397 http://dx.doi.org/10.3389/fnins.2016.00181 |
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author | Nanami, Takuya Kohno, Takashi |
author_facet | Nanami, Takuya Kohno, Takashi |
author_sort | Nanami, Takuya |
collection | PubMed |
description | Trade-off between reproducibility of neuronal activities and computational efficiency is one of crucial subjects in computational neuroscience and neuromorphic engineering. A wide variety of neuronal models have been studied from different viewpoints. The digital spiking silicon neuron (DSSN) model is a qualitative model that focuses on efficient implementation by digital arithmetic circuits. We expanded the DSSN model and found appropriate parameter sets with which it reproduces the dynamical behaviors of the ionic-conductance models of four classes of cortical and thalamic neurons. We first developed a four-variable model by reducing the number of variables in the ionic-conductance models and elucidated its mathematical structures using bifurcation analysis. Then, expanded DSSN models were constructed that reproduce these mathematical structures and capture the characteristic behavior of each neuron class. We confirmed that statistics of the neuronal spike sequences are similar in the DSSN and the ionic-conductance models. Computational cost of the DSSN model is larger than that of the recent sophisticated Integrate-and-Fire-based models, but smaller than the ionic-conductance models. This model is intended to provide another meeting point for above trade-off that satisfies the demand for large-scale neuronal network simulation with closer-to-biology models. |
format | Online Article Text |
id | pubmed-4865656 |
institution | National Center for Biotechnology Information |
language | English |
publishDate | 2016 |
publisher | Frontiers Media S.A. |
record_format | MEDLINE/PubMed |
spelling | pubmed-48656562016-05-30 Simple Cortical and Thalamic Neuron Models for Digital Arithmetic Circuit Implementation Nanami, Takuya Kohno, Takashi Front Neurosci Neuroscience Trade-off between reproducibility of neuronal activities and computational efficiency is one of crucial subjects in computational neuroscience and neuromorphic engineering. A wide variety of neuronal models have been studied from different viewpoints. The digital spiking silicon neuron (DSSN) model is a qualitative model that focuses on efficient implementation by digital arithmetic circuits. We expanded the DSSN model and found appropriate parameter sets with which it reproduces the dynamical behaviors of the ionic-conductance models of four classes of cortical and thalamic neurons. We first developed a four-variable model by reducing the number of variables in the ionic-conductance models and elucidated its mathematical structures using bifurcation analysis. Then, expanded DSSN models were constructed that reproduce these mathematical structures and capture the characteristic behavior of each neuron class. We confirmed that statistics of the neuronal spike sequences are similar in the DSSN and the ionic-conductance models. Computational cost of the DSSN model is larger than that of the recent sophisticated Integrate-and-Fire-based models, but smaller than the ionic-conductance models. This model is intended to provide another meeting point for above trade-off that satisfies the demand for large-scale neuronal network simulation with closer-to-biology models. Frontiers Media S.A. 2016-05-13 /pmc/articles/PMC4865656/ /pubmed/27242397 http://dx.doi.org/10.3389/fnins.2016.00181 Text en Copyright © 2016 Nanami and Kohno. http://creativecommons.org/licenses/by/4.0/ This is an open-access article distributed under the terms of the Creative Commons Attribution License (CC BY). The use, distribution or reproduction in other forums is permitted, provided the original author(s) or licensor are credited and that the original publication in this journal is cited, in accordance with accepted academic practice. No use, distribution or reproduction is permitted which does not comply with these terms. |
spellingShingle | Neuroscience Nanami, Takuya Kohno, Takashi Simple Cortical and Thalamic Neuron Models for Digital Arithmetic Circuit Implementation |
title | Simple Cortical and Thalamic Neuron Models for Digital Arithmetic Circuit Implementation |
title_full | Simple Cortical and Thalamic Neuron Models for Digital Arithmetic Circuit Implementation |
title_fullStr | Simple Cortical and Thalamic Neuron Models for Digital Arithmetic Circuit Implementation |
title_full_unstemmed | Simple Cortical and Thalamic Neuron Models for Digital Arithmetic Circuit Implementation |
title_short | Simple Cortical and Thalamic Neuron Models for Digital Arithmetic Circuit Implementation |
title_sort | simple cortical and thalamic neuron models for digital arithmetic circuit implementation |
topic | Neuroscience |
url | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4865656/ https://www.ncbi.nlm.nih.gov/pubmed/27242397 http://dx.doi.org/10.3389/fnins.2016.00181 |
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