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Synchronous OEIC Integrating Receiver for Optically Reconfigurable Gate Arrays
A monolithically integrated optoelectronic receiver with a low-capacitance on-chip pin photodiode is presented. The receiver is fabricated in a 0.35 μm opto-CMOS process fed at 3.3 V and due to the highly effective integrated pin photodiode it operates at μW. A regenerative latch acting as a sense a...
| Autores principales: | , , , |
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| Formato: | Online Artículo Texto |
| Lenguaje: | English |
| Publicado: |
MDPI
2016
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| Materias: | |
| Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4934187/ https://www.ncbi.nlm.nih.gov/pubmed/27231915 http://dx.doi.org/10.3390/s16060761 |