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Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV)
3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration sy...
Autores principales: | , |
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Formato: | Online Artículo Texto |
Lenguaje: | English |
Publicado: |
Springer US
2017
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Materias: | |
Acceso en línea: | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC5247381/ https://www.ncbi.nlm.nih.gov/pubmed/28105605 http://dx.doi.org/10.1186/s11671-017-1831-4 |
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author | Shen, Wen-Wei Chen, Kuan-Neng |
author_facet | Shen, Wen-Wei Chen, Kuan-Neng |
author_sort | Shen, Wen-Wei |
collection | PubMed |
description | 3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper. |
format | Online Article Text |
id | pubmed-5247381 |
institution | National Center for Biotechnology Information |
language | English |
publishDate | 2017 |
publisher | Springer US |
record_format | MEDLINE/PubMed |
spelling | pubmed-52473812017-02-02 Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV) Shen, Wen-Wei Chen, Kuan-Neng Nanoscale Res Lett Nano Review 3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper. Springer US 2017-01-19 /pmc/articles/PMC5247381/ /pubmed/28105605 http://dx.doi.org/10.1186/s11671-017-1831-4 Text en © The Author(s). 2017 Open AccessThis article is distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution, and reproduction in any medium, provided you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license, and indicate if changes were made. |
spellingShingle | Nano Review Shen, Wen-Wei Chen, Kuan-Neng Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV) |
title | Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV) |
title_full | Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV) |
title_fullStr | Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV) |
title_full_unstemmed | Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV) |
title_short | Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV) |
title_sort | three-dimensional integrated circuit (3d ic) key technology: through-silicon via (tsv) |
topic | Nano Review |
url | https://www.ncbi.nlm.nih.gov/pmc/articles/PMC5247381/ https://www.ncbi.nlm.nih.gov/pubmed/28105605 http://dx.doi.org/10.1186/s11671-017-1831-4 |
work_keys_str_mv | AT shenwenwei threedimensionalintegratedcircuit3dickeytechnologythroughsiliconviatsv AT chenkuanneng threedimensionalintegratedcircuit3dickeytechnologythroughsiliconviatsv |